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Evaluating Positive Feedback Adiabatic Logic in 16nm FinFET with a Realistic Power-Clock
Adiabatic logic reuses the energy stored on load capacitances through quasi-reversible switching, enabling a lower minimum energy consumption than conventional static CMOS. Yet its practicality in FinFET technologies and at multi-GHz clock rates has yet to be investigated. This work provides a syste
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