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FINNAS: FINN-Guided Hardware-Aware NAS and Pruning for FPGA Jet Substructure Classification

Chauffour, Eva et al.
arXiv (OAI Expanded) · Papers
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FPGAs are well suited to deploying quantised neural networks (QNNs) under strict accuracy, latency, and resource constraints; however, identifying efficient model-accelerator combinations commonly requires extensive manual design-space exploration and repeated hardware synthesis. This paper presents
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