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STL-Witness: Signal Generation from STL Specifications

Ničković, Dejan
Springer Nature OA · Papers · License: CC BY 4.0
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algorithmsartificial-intelligencecompilerscomputer-scienceinterpretersprogramming-languages
Constructing correct Signal Temporal Logic (STL) specifications from informal requirements is a challenging task, due to the ambiguous and imprecise nature of natural language descriptions. Witness traces can support requirements elicitation and validation by providing concrete behavioral examples t
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