arXiv (All)
open access
ML-Assisted Power Side-Channel Attacks on ML Accelerators in Shared FPGAs
Cloud providers offer on-demand access to Field-Programmable Gate Arrays (FPGAs), and multi-tenant FPGAs let multiple users share one device to improve utilization. This sharing introduces security risks: an adversary co-located with a victim on the same FPGA can mount power side-channel attacks aga
Conceptio Open Archive
Analyze & explore related research in Conceptio
Connect this record directly into your research workflow or AI agent. Explore citations across open repositories, query full text, and export structured proof bundles.
This document is indexed with metadata only: full text is not available in the archive for this record. Open the official source ↗
Related documents
- Information-Theoretically Secure Aggregation for Lightweight Federated Learning: Resilient to Dropouts and Adversaries#987757
- CHRONOS: A Hardware-Assisted Phase-Decoupled Framework for Secure Federated Learning in IoT#123989
- Power, Performance, and Area of HPC-Based Malware Detectors: An FPGA and Open-PDK ASIC Study#1296802
- Power, Performance, and Area of HPC-Based Malware Detectors: An FPGA and Open-PDK ASIC Study#1291746
- Encrypt What Matters: When Selective Homomorphic Inference Is Efficient#987113
Record · ID 1327754
Retrieved via Conceptio: every document is proof-bundled with source, license, and retrieval metadata.
Retrieved via Conceptio: every document is proof-bundled with source, license, and retrieval metadata.
Bring this data into your agent: Connect via MCP or API · 20 free credits to start · no card required
Read the Docs → · View CLI source on GitHub · Conceptio Open Knowledge Archive
Read the Docs → · View CLI source on GitHub · Conceptio Open Knowledge Archive