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The Phantom of PCIe: Constraining Generative Artificial Intelligences for Practical Peripherals Trace Synthesizing

Huang, Zhibai et al. · 2024 · arxiv_oai
arXiv (OAI) · Papers · 2024
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artificial-intelligencehardware-architecturemachine-learning
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[2411.06376] The Phantom of PCIe: Constraining Generative Artificial Intelligences for Practical Peripherals Trace Synthesizing Skip to main content Search Submit Donate Log in Search arXiv Press Enter to search · Advanced search Computer Science > Machine Learning arXiv:2411.06376 (cs) [Submitted on 10 Nov 2024 ( v1 ), last revised 11 Apr 2026 (this version, v3)] Title: The Phantom of PCIe: Constraining Generative Artificial Intelligences for Practical Peripherals Trace Synthesizing Authors: Zhibai Huang , Chen Chen , James Yen , Yihan Shen , Yongchen Xie , Zhixiang Wei , Kailiang Xu , Yun Wang , Fangxin Liu , Tao Song , Mingyuan Xia , Zhengwei Qi View a PDF of the paper titled The Phantom of PCIe: Constraining Generative Artificial Intelligences for Practical Peripherals Trace Synthesizing, by Zhibai Huang and 11 other authors View PDF HTML (experimental) Abstract: Peripheral Component Interconnect Express (PCIe) is the de facto interconnect standard for high-speed peripherals and CPUs. The development of PCIe devices for emerging applications requires realistic Transaction Layer Packet (TLP) traces that accurately simulate device-CPU interactions. While generative AI offers a promising avenue for synthesizing complex TLP sequences, it is prone to a critical challenge inherent in all generation tasks: hallucination. Naively applying these models often produces traces that violate fundamental PCIe protocol rules, such as ordering and causality, rendering them unusable for device simulation. To resolve this, our work introduces a methodology to bridge the gap between generative AI and high-fidelity device simulation. This paper presents Phantom, a framework that systematically addresses AI-generated hallucinations in TLP synthesis. Phantom achieves this by coupling a generative backbone with a novel post-processing filter that enforces PCIe-specific constraints, effectively eliminating invalid TLP sequences. We validate Phantom's effectiveness by synthesizing TLP traces for an actual PCIe network interface card. Experimental results show that Phantom produces practical, large-scale TLP traces, significantly outperforming existing models, with improvements of up to 1000$\times$ in task-specific metrics and up to 2.19$\times$ in Fréchet Inception Distance (FID) compared to backbone-only methods. The prototype implementation has been made open-source. Comments: Accepted by DAC'26 Subjects: Machine Learning (cs.LG) ; Artificial Intelligence (cs.AI); Hardware Architecture (cs.AR) Cite as: arXiv:2411.06376 [cs.LG] (or arXiv:2411.06376v3 [cs.LG] for this version) https://doi.org/10.48550/arXiv.2411.06376 Focus to learn more arXiv-issued DOI via DataCite Related DOI : https://doi.org/10.1145/3770743.3803983 Focus to learn more DOI(s) linking to related resources Submission history From: Zhibai Huang [ view email ] [v1] Sun, 10 Nov 2024 07:15:03 UTC (3,063 KB) [v2] Mon, 13 Jan 2025 14:39:34 UTC (3,063 KB) [v3] Sat, 11 Apr 2026 05:27:46 UTC (3,498 KB) Full-text links: Access Paper: View a PDF of the paper titled The Phantom of PCIe: Constraining Generative Artificial Intelligences for Practical Peripherals Trace Synthesizing, by Zhibai Huang and 11 other authors View PDF HTML (experimental) TeX Source view license Current browse context: cs.LG < prev | next > new | recent | 2024-11 Change to browse by: cs cs.AI cs.AR References & Citations NASA ADS Google Scholar Semantic Scholar export BibTeX citation Loading... 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