arXiv:2605.11382v1 [quant-ph] 12 May 2026
Classic and Quantum Task-Based Intelligent Runtime for QIRs Running on Multiple QPUs Narasinga Rao Miniskar*
Elaine Wong*
Oak Ridge National Laboratory Oak Ridge, TN 37830, USA [email protected]
Oak Ridge National Laboratory Oak Ridge, TN 37830, USA [email protected]
Vicente Leyton-Ortega
Jeffrey S. Vetter
Travis S. Humble
Oak Ridge National Laboratory Oak Ridge, TN 37830, USA [email protected]
Oak Ridge National Laboratory Oak Ridge, TN 37830, USA [email protected]
Oak Ridge National Laboratory Oak Ridge, TN 37830, USA [email protected]
Abstract—High-performance computing systems are rapidly evolving into heterogeneous platforms that fuse quantum accelerators with traditional classical processing units (CPUs) and graphical processing units (GPUs). This convergence calls for runtimes capable of managing both classical and quantum workloads in a unified manner. We introduce an intelligent, task-based runtime that marries the Intelligent RuntIme System (IRIS) asynchronous scheduler with a quantum programming stack through the Quantum Intermediate Representation Execution Engine (QIR-EE). Our design allows programs written in the quantum intermediate representation (QIR) to be dispatched concurrently to a variety of back-ends, including multiple quantum simulators and nascent quantum processors, enabling genuine hybrid execution on a single node. To illustrate its practicality, we partition a 4-qubit and 20-qubit circuit into three sub-circuits using quantum circuit cutting via the QCut library. Each sub-circuit is simulated independently by the QIR-EE driver within IRIS, after which a classical post-processing step merges the simulation results to recover the outcome of the original full-circuit computation. This case study demonstrates how finer task granularity can enable the parallel execution and lower the simulation burden per quantum task while preserving overall accuracy, highlighting the feasibility of our hybrid approach. Index Terms—quantum computing, IRIS, QIR-EE, quantum circuit cutting, quantum intermediate representation, heterogeneous computing, hybrid computing, quantum processing unit, task-based runtime systems, multi-qpu execution
I. I NTRODUCTION Hybrid quantum-classical programming has emerged as a necessity for extracting speedups from nascent quantum processors, yet most quantum software stacks remain siloed, providing only a dedicated runtime for a single hardware platform. While the quantum software community has been developing full-stack solutions for dedicated quantum computing hardware, the essential concern of integrating such paradigms into existing software architectures, frameworks, and tools [1]–[3] has largely remained unaddressed. The gap lies in the seamless orchestration of quantum and classical tasks within a single, scalable workflow. To address this, *These authors contributed equally to this work and are designated as cofirst authors.
we integrate the task-based IRIS heterogeneous runtime [4], [5] with the hardware-agnostic QIR [6] and its execution engine QIR-EE [7]. IRIS supplies a robust asynchronous scheduler [8]–[10] that manages fine-grained dependencies, dynamic device placement, and execution across CPUs, GPUs, and analogously, quantum processing units (QPUs) as either real quantum hardware or quantum simulators, while QIR-EE offers a portable bridge between QIR code and diverse quantum back-ends, including emerging QPUs. By exposing QIR kernels as IRIS tasks, we enable concurrent scheduling of classical computations and quantum sub-programs on the same node, thereby realizing a truly hybrid runtime that respects the data-flow and synchronization requirements of both paradigms.
The early efforts of Q-IRIS (IRIS and QIR-EE) [11] were limited to calling Python-based Qiskit [2] kernels for the given QIR programs and running them only on Qiskit’s AER simulator, this paper presents a true classical-quantum hybrid workflow. With recent extensions to QIR-EE integration in IRIS, the user can run the QIR programs on any QPU (real or simulator) through the eXtreme-scale ACCelerator (more commonly known as XACC) programming framework [12], which is connected to real hardware via vendor application programming interfaces (APIs) or Google’s state simulator backeend QSIM [13], which accessible directly from QIREE. Furthermore, IRIS has been extended to support classical post-processing implemented in pure Python. The extended framework executes these tasks on CPU cores through the IRIS heterogeneous-memory model, which directly maps the outputs of QPU operations to NumPy objects. The quantum portion is executed on a variety of back-ends, including local simulators and real QPU hardware (e.g., IONQ ion-trap devices [14]), thereby enabling end-to-end hybrid applications that seamlessly couple classical processing with diverse quantum simulators and real quantum processors.
High Level
Python with IRIS tasks for Quantum Circuits. Kernels could be in OpenQASM or QIR
Low Level
Host Code
HIP Kernel
CUDA Kernel
QASM Kernel
QIR Kernel
Qiskit Driver
QIR-EE Driver
IRIS Python/C/C++ Interfaces Dynamic OpenMP Platform Loader Driver
HIP Driver
Task Scheduling
Task
Memory Handler Q-IRIS
OpenMP Kernel
Data Movement
Task Task
Vendor Runtimes
OpenMP Runtime
Kernel Executions
CPU
CUDA Driver
Task
Task
Task
Task
Task
Task
Task
Task
Task
HIP Runtime
CUDA Runtime
Qiskit Runtime
QIR-EE Runtime
AMD GPU
Nvidia GPU
QPU
Fig. 1. IRIS: Intelligent RuntIme System Design with QPUs. Proposed tightly coupled integration of QIR-EE in IRIS runtime is shown in green boxes.
Our prototype demonstrates the practicality of this approach through a quantum circuit-cutting experiment. A 4-qubit and 20-qubit circuit are decomposed into three sub-circuits, each simulated independently by QIR-EE under IRIS’s orchestration. A subsequent classical post-processing task merges the simulation results to reconstruct the full circuit’s output, illustrating how task granularity reduces per-quantum-task load and improves throughput on early-stage QPUs. This work not only showcases a portable hybrid programming model that scales across multiple QPUs but also highlights the potential for future research to extend the runtime’s capabilities—such as dynamic resource allocation and heterogeneous memory management—to fully exploit the evolving landscape of quantum-classical high-performance computing.
A. IRIS
OpenCL for generic CPUs and GPUs, Xilinx high-level synthesis (HLS) C++ for FPGAs, and DSP-specific C++ for Hexagon units. The runtime supplies multi-stream asynchronous capabilities [9], intelligent data orchestration [10] automatically migrating data between host memory and the various accelerator memories to avoid programmer burden. Configurable scheduling policies allow the system to decide dynamically [8] where each task should run, maximizing resource utilization. In addition, IRIS performs dynamic compilation so that kernels are lazily built and optimized at execution time. Together, these features streamline heterogeneous programming while preserving performance portability across the supported hardware platforms. The architecture is deliberately modular, enabling straightforward extension to new device types without disrupting existing workflows. As a result, developers can focus on algorithmic development rather than the intricacies of device-specific code.
IRIS [4], [5] is a heterogeneous runtime system that brings together a broad spectrum of compute devices, including CPUs, Nvidia and AMD GPUs, Xilinx and Intel field programmable gate arrays (FPGAs), and Snapdragon Hexagon digital signal processors (DSPs), as shown in Figure 1. Through a concise task-based API, developers can create and submit work items whose kernels are written in the appropriate programming model for each target: Compute Unified Device Architecture (CUDA) for Nvidia GPUs, Heterogeneouscomputing Interface for Portability (HIP) for AMD GPUs,
IRIS already serves as the execution engine for a number of high-level programming frameworks such as OpenACC, SYCL (pronounced “sickle”), Python, and Julia, demonstrating its versatility in real-world applications. Its plug-in-style design allows the integration of additional compute units, exemplified by recent support for quantum processors via the QIR domain-specific language [11], but it is limited to use it for single QPU (QSIM) due to QIR-EE thread safety limitations. In this work, we augment IRIS with complete QIREE quantum computing capabilities, thereby offering a unified
II. BACKGROUND
platform where the same quantum code can be executed on virtual QPUs that simulate/emulate conventional CPUs and GPUs, and real dedicated quantum processing units. This extension leverages IRIS’s core mechanisms—data orchestration, dynamic scheduling, and runtime compilation—to adapt the workload to the strengths of each underlying device. By providing a single programming model across these diverse substrates, developers are freed from dealing with device-specific programming paradigms. B. QIR-EE The Quantum Intermediate Representation Execution Engine (QIR-EE) is a C++ library created by ORNL [7], [15] that translates quantum programs written in the Quantum Intermediate Representation (QIR) [6] into executable code for both simulators and real hardware. QIR itself was introduced to enable cross-framework compatibility, allowing researchers to combine diverse programming languages with emerging quantum devices. Once compiled, the QIR-EE binary accepts a QIR *.ll file, selects an accelerator target, and specifies the number of shots to run. It then dispatches the program to the chosen backend, effectively serving as a quantum runtime that can be plugged into the IRIS workflow as a QPU layer. The engine relies on LLVM’s runtime infrastructure to process classical control flow while exposing hooks for binding backend-specific operations. Current support for simulators and hardware access is routed through the XACC framework [12]. However, QIR-EE presently lacks the ability to launch multiple QIR programs concurrently across several accelerators, a limitation that the IRIS integration seeks to address as a proof-of-concept for asynchronous, heterogeneous execution. III. IRIS WITH QIR-EE FOR CLASSIC AND QUANTUM The core of our hybrid runtime is IRIS, which is extended to recognize QIR kernels as first-class tasks. In this model, a user submits a QIR program together with any classical compute kernels (for example, post-processing) to the IRIS task graph. The IRIS runtime resolves fine-grained data dependencies, assigns each task to an appropriate backend—be it a CPU core, GPU, quantum simulator, or an emerging QPU—and orchestrates concurrent execution across all available devices. By decoupling the task definition from the underlying hardware, the same application code can run on a purely classical cluster or a mixed classical/quantum node without modification. We have extended IRIS versatile heterogeneous runtime to encompass quantum processors by employing a dedicated QIR-EE device driver, which is shown in Figure 2. IRIS scheduler orchestrates quantum tasks such as QTask-T0, QTask-T1, QTask-T2 and QTask-T3 to run it parallel on multiple QPUs, alongside a classical post-processing stage task to run it on the CPU, all within the same heterogeneous schedule. Because QIR-EE’s runtime is not thread-safe, the driver spawns an isolated process that runs the QIR-EE engine together with the XACC back-end; communication is carried out via a
memory-mapped (MMAP) region that shares the QIR LLVM module, control commands, and final expectation values. To bridge QIR code to the heterogeneous back-ends, we have exposed C-APIs in QIR-EE and have written a QIREE driver in IRIS which uses these APIs to 1) load the QIR module from memory, 2) compile them on-the fly, 3) estimate the amount of memory size required for output expectation values of given QIR quantum circuit, 4) run the circuit either using QSIM or the XACC backend based on the task kernel configuration, and 5) extract the expectation value results into IRIS heterogeneous memory model. This tight integration removes the serial bottleneck that previously plagued QIR runtimes. Because the driver can concurrently dispatch multiple QIR programs—each possibly accompanied by auxiliary classical tasks—to different accelerators, the IRIS scheduler can now exploit the full spectrum of hardware resources in parallel. The result is a seamless, high-throughput workflow that blends quantum and classical computation while preserving the simplicity of the IRIS programming model. IV. R ESULTS In our prototype, we demonstrate the practicality of this approach with a quantum circuit-cutting experiment [11]. A 4-qubit and 20-qubit Greenberger–Horne–Zeilinger (GHZ) circuit is partitioned into three sub-circuits via a wire-cutting procedure described in [16] and briefly illustrated in Fig. 3 (for the 4-qubit case). Each sub-circuit is dispatched as an independent IRIS task to a quantum simulator through the QIR-EE driver, which gives access directly to the Google’s simulator QSIM, or to XACC, which provides hardware backend access. The overall workload is thereby reduced by a factor of more than three but increases the number of quantum tasks which can be run in parallel. Once all sub-circuits finish, a classical post-processing task aggregates the measurement outcomes to estimate the full circuit result. Per the algorithm consisting of two wire cuts, the resulting three sub-circuits produces 192 task kernels to be dispatched to a QPU backend [11], [17]. A post-processing task works on the measurement outcomes, represented as probability distributions of bitstring counts, which are then used to estimate the expectation value of an observable (whose theoretically known value can be used as ground-truth). This reconstruction is compiled into an estimation formula for ⟨ZZZZ⟩ via the quasi-probability decomposition: X |ck | |cs | X sgn(ck )sgn(cs )ok os f (y1 , y2 , y3 , y4 ) γ2 γ γ k,s
(y1 ,...,y4 ), (os ,ok )
×P [y1 , ok |k] · P [y2 , os |k] · P [y3 , y4 |s], where P [y1 , ok |k], P [y2 , os |k], and P [y3 , y4 |s] represent the probability distributions conditioned on indices k, s, with ok and os being the measurements of ancillary qubits (see Fig. 3) and γ, |c|’s, f representing overhead factors, weights, and a function that emulates the behavior of the coefficients resulting
Python based Quantum (QIR) Tasks and Classic Tasks
QTask-T0
QTask-T1
QTask-T2
QTask-T3
Classic Task: Post Processing
IRIS Python Interfaces
Q-IRIS Runtime
OpenMP / CPU Driver
CPU [ Post Processing ]
QIREE-Device-0
QIREE-Device-1
QIREE Thread
QIREE Thread
Quantum Command Handler
QIREE Process (XACC)
Quantum Command Handler
QIREE Process (XACC)
MMAP
MMAP
QPU0 [ QTask-T0, QTask-T2 ]
QPU1 [ QTask-T1, QTask-T3 ]
Fig. 2. IRIS with QIR-EE device (Q-IRIS) driver to connect to multiple QPUs through XACC. The QSIM simulator can be accessed separate from XACC and directly through QIR-EE via QIR-QSIM. The top green box illustrates the structure of the task graph in the form of a directed acyclic graph. TABLE I C IRCUIT CUTTING WITH FINITE SHOT UNCERTAINTY PROPAGATION (σ) USING Q-IRIS (1000 SHOTS , 4 QUBITS IN GHZ) Backend Used
⟨ZZZZ⟩
σ
Full (s)
Create (s)
Exec+Post (s)
Retrieve (s)
XACC/AER XACC/QPP XACC/QSIM XACC/IONQ:SIM.IDEAL XACC/IONQ:SIM.ARIA-1 QIR-QSIM
0.971745 0.989037 0.983038 1.000000 1.059612 0.989994
0.038755 0.038768 0.038759 0.044721 0.044092 0.038759
4.2048 4.2044 4.1511 72.9430 81.2316 3.6968
0.1683 0.1766 0.1784 0.1727 0.1761 0.1936
3.9710 3.9595 3.9068 72.7037 80.9893 3.4341
0.0003 0.0002 0.0002 0.0003 0.0003 0.0002
from the wire cuts, respectively. This case study shows that finer task granularity lowers the per-quantum-task simulation burden while maintaining reasonable accuracy, validating the feasibility of our hybrid runtime and laying the groundwork for future extensions such as dynamic resource allocation and heterogeneous memory management. Table I summarizes the performance of our Q-IRIS framework when a 4-qubit GHZ circuit is partitioned into three sub-circuits (two cuts) which results in 192 2-qubit circuits (quantum tasks), later to be reassembled according to the formula for estimating the expectation value of the desired observable. All simulator backends produce expectation values for ⟨ZZZZ⟩ that are within <5% of the ideal value 1, confirming the effectiveness of the cut-and-re-assemble strategy in preserving circuit fidelity. Furthermore, we report σ’s as propagated shot noise from the three sub-circuits in our simulator experiments for the 4-qubit GHZ. These numbers would improve as we increase the number of shot counts
to our desired accuracy, e.g., increasing number of shots to 4000 halves σ. We note that the propagated uncertainty is present because circuit cutting reconstructs the observable from many finite-shot fragment estimators, whose variances accumulate and are amplified by the reconstruction weights. In summary, the observed deviation in ⟨ZZZZ⟩ may reflect both statistical uncertainty from finite-shot reconstructed estimators and systematic effects (backend/noise/reconstruction bias), but our propagated error (σ) quantifies the statistical part only. Table II shows some results from a vendor backend, provided by the Oak Ridge Leadership Computing Facility’s (OLCF) Quantum Computing User Program (QCUP) [18] via vendor APIs (currently integrated in XACC) for executing our quantum circuits. For testing our framework, we leveraged IONQ’s trapped-ion technology [14] and simulators. The IONQ’s ion-trap simulators (IDEAL and ARIA-1) incurs a slowdown (∼72-81s) due to remote communications, while the real QPU QPU.FORTE-1 is orders of magnitude slower
|0 〉 |0 〉
Meas 𝑦 1
𝐻
Meas
𝑜 𝑘
Meas 𝑦 2
|𝑘 〉 |0 〉
Meas
|𝑠 〉 |0 〉
𝑜 s
Meas
𝑦3
Meas
𝑦4
Fig. 3. Illustration of how to partition a 4-qubit GHZ circuit using two wire cuts, creating three 2-qubit sub-circuits. The |k⟩, |s⟩ are initialized based on the measurement outcome (orange) in the previous circuit (depending on the measurement basis), and can be pre-computed. Their corresponding outputs ok , os , together with outputs y1 , y2 , y3 , y4 is used to construct the estimator for ⟨ZZZZ⟩ via the quasi-probability decomposition formula [11], [16]. The 20-qubit circuit is partitioned similarly for ⟨Z ⊗20 ⟩ estimation.
(∼22,000s), which is due to significant wait time for physical hardware to be available for each batch that is sent remotely. In the real QPU case, we have observed a lower expectation value estimation as we didn’t choose any error mitigation approach during the run. We also observe the effect of hardware and shot noise on the final outcome by running a no-cut version of the experiment. In contrast, the QIREE direct implementation of QSIM achieves the fastest run (∼1s), demonstrating the advantage of lightweight simulation backends for small sub-circuits without the need to rely on XACC. When we do not apply cutting and run a full 20-qubit GHZ on QIR-EE’s QSIM, the wall-time rises to ∼83s, illustrating that circuit cutting can drastically reduce the per-task simulation load and improve overall throughput on early-stage QPUs while still maintaining accuracy. V. C ONCLUSION We presented a classic-and-quantum task-based intelligent runtime that couples the IRIS runtime framework with QIREE, enabling QIR programs to be executed concurrently on multiple QPUs and classical accelerators. By modeling QIR kernels as IRIS tasks, the system achieves fine-grained scheduling, dynamic device placement, and true hybrid execution on a single node. A 4-qubit and 20-qubit circuit cut into three sub-circuits, each running on both simulator QPUs and real QPUs (IONQ) independently, demonstrates that task granularity preserves accuracy while reducing per-quantum load and improving throughput on early-stage QPUs. These results confirm the practicality of a portable hybrid model that scales across diverse simulators and real quantum hardware. Future work will extend backend capability for Q-IRIS independent of XACC (in progress are Xanadu’s suite of Lightning simulators [19]), dynamic resource allocation, heterogeneous memory management, and multi-node support to fully exploit the evolving quantum-classical HPC ecosystem.
ACKNOWLEDGMENT This manuscript has been authored by UT-Battelle LLC under contract DE-AC05-00OR22725 with the US Department of Energy (DOE). The US government retains and the publisher, by accepting the article for publication, acknowledges that the US government retains a nonexclusive, paid-up, irrevocable, worldwide license to publish or reproduce the published form of this manuscript, or allow others to do so, for US government purposes. DOE will provide public access to these results of federally sponsored research in accordance with the DOE Public Access Plan (https://www.energy.gov/doe-publicaccess-plan). This work was supported by the U.S. Department of Energy, Office of Science under Contract No. DE-AC05-00OR22725, with funding from the Office of Advanced Scientific Computing Research’s Accelerated Research in Quantum Computing Program’s Modular and Error-Aware Software Stack for Heterogeneous Quantum Computing Ecosystems (MACHQ) project and resources of Oak Ridge National Laboratory’s Experimental Computing Laboratory (ExCL). This research also used resources of the Oak Ridge Leadership Computing Facility, which is a DOE Office of Science User Facility supported under Contract DE-AC0500OR22725. In particular, the Quantum Computing User Program (QCUP) run by OLCF enabled the use of IONQ’s backends. The authors thank Michael Sandoval from ORNL and Heidi Nelson-Quillin from IONQ for their technical support. R EFERENCES [1] V. Bergholm, J. Izaac, M. Schuld, and et al., “Pennylane: Automatic differentiation of hybrid quantum-classical computations,” 2022. [Online]. Available: https://arxiv.org/abs/1811.04968 [2] A. Javadi-Abhari, M. Treinish, K. Krsulich, C. J. Wood, J. Lishman, J. Gacon, S. Martiel, P. D. Nation, L. S. Bishop, A. W. Cross, B. R. Johnson, and J. M. Gambetta, “Quantum computing with Qiskit,” 2024. [3] R. S. Smith, M. J. Curtis, and W. J. Zeng, “A practical quantum instruction set architecture,” 2016. [4] J. Kim, S. Lee, B. Johnston, and J. S. Vetter, “IRIS: A performanceportable framework for cross-platform heterogeneous computing,” IEEE Transactions on Parallel and Distributed Systems, 2024. [5] N. R. Miniskar, S. Lee, J. Beau, A. Young, M. A. H. Monil, P. ValeroLara, and J. S. Vetter, “IRIS reimagined: Advancements in intelligent runtime system for task-based programming,” in Workshop on Asynchronous Many-Task Systems and Applications. Springer, 2024, pp. 46–58. [6] QIR Alliance, QIR Specification, 2025, accessed: 2025-01-13. [Online]. Available: https://github.com/qir-alliance/qir-spec [7] E. Wong, V. Leyton-Ortega, D. Claudino, S. R. Johnson, A. J. Adams, S. Afrose, M. Gowrishankar, A. Cabrera, and T. S. Humble, “A crossplatform execution engine for the quantum intermediate representation,” The Journal of Supercomputing, vol. 81, no. 16, p. 1521, 2025. [8] B. Johnston, N. R. Miniskar, A. Young, M. A. H. Monil, S. Lee, and J. S. Vetter, “IRIS: Exploring performance scaling of the intelligent runtime system and its dynamic scheduling policies,” in 2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). IEEE, 2024, pp. 58–67. [9] N. R. Miniskar, A. R. Young, M. A. H. Monil, K. Asifuzzaman, B. Johnston, K. Teranishi, and J. S. Vetter, “Iris-mash: Efficient multi-device asynchronous multi-stream heterogeneous computing,” in Proceedings of the 54th International Conference on Parallel Processing, 2025, pp. 764–773.
TABLE II BACKEND EXPERIMENTS ON HARDWARE AND A STATE SIMULATOR (100 SHOTS ) Backend Used
⟨Z ⊗n ⟩
Full (s)
Create (s)
Exec+Post (s)
Retrieve (s)
n
# Cut Circuits
XACC/IONQ:QPU.FORTE-1 XACC/IONQ:QPU.FORTE-1
0.769232 0.980198
22061.0500 407.0000
0.1400 0.1400
22060.8600 406.8597
0.0003 0.0003
4 4
192 no cut
QIR-QSIM QIR-QSIM
0.973800 1.000000
1.0605 82.74413
0.1757 0.0014
0.8450 82.6956
0.0002 0.0026
20 20
192 no cut
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https://ionq.com [15] QIR-EE Developers, “QIR-EE,” [Computer Software] https://doi.org/10.11578/qiree/dc.20250114.1, 2025. [Online]. Available: https://github.com/ORNL-QCI/qiree [16] H. Harada, K. Wada, and N. Yamamoto, “Doubly optimal parallel wire cutting without ancilla qubits,” PRX Quantum, vol. 5, no. 4, p. 040308, 2024. [17] QCut Developers, “QCut,” 2026, published as computer software. Last accessed: February 14, 2026. [Online]. Available: https://github.com/JooNiv/QCut [18] Oak Ridge Leadership Computing Facility, “Quantum Computing User Program,” https://docs.olcf.ornl.gov/quantum/quantum access.html, 2026, accessed: 2026-03-11. [19] Xanadu, “Pennylane Lightning Simulator,” https://docs.pennylane.ai/projects/lightning/en/stable/index.html, 2025, accessed: 2026-03-11.