arXiv:2604.15001v1 [cs.AI] 16 Apr 2026
COEVO: Co-Evolutionary Framework for Joint Functional Correctness and PPA Optimization in LLM-Based RTL Generation Heng Ping
Peiyu Zhang
Shixuan Li
[email protected] University of Southern California United States
[email protected] University of Southern California United States
[email protected] University of Southern California United States
Wei Yang
Anzhe Cheng
Shukai Duan
[email protected] University of Southern California United States
[email protected] University of Southern California United States
[email protected] University of Southern California United States
Xiaole Zhang
Paul Bogdan∗
[email protected] University of Southern California United States
[email protected] University of Southern California United States
Abstract
1
LLM-based RTL code generation methods increasingly target both functional correctness and PPA quality, yet existing approaches universally decouple the two objectives, optimizing PPA only after correctness is fully achieved. Whether through sequential multiagent pipelines, evolutionary search with binary correctness gates, or hierarchical reward dependencies, partially correct but architecturally promising candidates are systematically discarded. Moreover, existing methods reduce the multi-objective PPA space to a single scalar fitness, obscuring the trade-offs among area, delay, and power. To address these limitations, we propose COEVO, a co-evolutionary framework that unifies correctness and PPA optimization within a single evolutionary loop. COEVO formulates correctness as a continuous co-optimization dimension alongside area, delay, and power, enabled by an enhanced testbench that provides fine-grained scoring and detailed diagnostic feedback. An adaptive correctness gate with annealing allows PPA-promising but partially correct candidates to guide the search toward jointly optimal solutions. To preserve the full PPA trade-off structure, COEVO employs four-dimensional Pareto-based non-dominated sorting with configurable intra-level sorting, replacing scalar fitness without manual weight tuning. Evaluated on VerilogEval 2.0 and RTLLM 2.0, COEVO achieves 97.5% and 94.5% Pass@1 with GPT-5.4-mini, surpassing all agentic baselines across four LLM backbones, while attaining the best PPA on 43 out of 49 synthesizable RTLLM designs. Our code is available at https://github.com/hping666/COEVO/.
The growing complexity of modern integrated circuits has made manual Register-Transfer Level (RTL) design a costly bottleneck in hardware development [2, 3, 14]. Large language models (LLMs) [35] offer a promising direction for automating RTL code generation from natural language specifications [33, 34], with standardized benchmarks such as VerilogEval [15, 21] and RTLLM [17, 18] accelerating progress. Extensive research has advanced functional correctness through domain-specific fine-tuning [5, 16, 20, 39], reinforcement learning with tool feedback [27, 30], and multi-agent frameworks [1, 8, 13, 22, 40]. However, functional correctness alone is insufficient for practical deployment, as LLM-generated RTL frequently exhibits suboptimal PPA compared to engineer-written implementations [4, 9, 23, 26]. Jointly optimizing functional correctness and PPA quality during spec-to-RTL generation has therefore become an important research direction. A growing body of work has begun to address PPA quality in LLM-based RTL design. RTL-to-RTL methods such as POET [23] and SymRTLO [31] improve PPA through evolutionary or symbolic approaches on existing correct designs, but do not address the specto-RTL setting where no correct implementation is available. Within the spec-to-RTL setting, in-context learning approaches such as Prompt for Power [9] inject PPA knowledge into prompts, and multiagent frameworks such as VeriOpt [26] assign dedicated agents for correctness and PPA. However, these sequential pipelines optimize PPA only after correctness is confirmed, causing the process to oscillate between functional repair and PPA improvement. Conservative modifications yield limited PPA gains, while aggressive restructuring risks functional regression. Evolutionary approaches such as REvolution [19] enable broader design space exploration through population-based search, but impose a binary correctness gate that discards all incorrect candidates. Moreover, they reduce the inherently multi-objective PPA optimization to a single scalar through weighted-sum aggregation. ChipSeek-R1 [4] incorporates PPA feedback into reinforcement learning training but still suppresses PPA signals when correctness is not achieved.
CCS Concepts • Computing methodologies → Artificial intelligence; • Hardware → Hardware description languages and compilation; High-level and register-transfer level synthesis.
Keywords RTL code generation, large language models, co-evolutionary optimization, PPA optimization ∗ Corresponding author.
Introduction
Ping et al.
Despite the diversity of paradigms, existing approaches share two fundamental limitations. First, all methods decouple correctness from PPA optimization: multi-agent approaches optimize PPA only after full correctness, evolutionary methods impose a binary gate that discards all incorrect candidates regardless of architectural merit, and training-based methods suppress PPA reward when correctness fails. Across all paradigms, partially correct designs with superior architectural characteristics are systematically discarded, even when they could serve as stepping stones toward jointly optimal solutions. Second, existing methods reduce multi-objective PPA to a single scalar fitness through weighted-sum aggregation or proxy metrics, obscuring trade-offs among area, delay, and power [24] and requiring manual weight tuning without guaranteeing Pareto optimality. To address both limitations, we propose COEVO, a co-evolutionary framework that unifies correctness and PPA optimization within a single evolutionary loop. To overcome the decoupled optimization problem, COEVO formulates correctness as a continuous cooptimization dimension alongside area, delay, and power, enabled by an enhanced testbench with fine-grained scoring and diagnostic feedback. An adaptive correctness gate and cross-objective operators allow PPA-promising but partially correct candidates to guide the search while converging to full correctness. To overcome singleobjective scalarization, COEVO employs 4D (four-dimensional) Pareto-based non-dominated sorting [6] with configurable intralevel sorting that preserves trade-off structure without manual weight tuning. Evaluated on the RTLLM and VerilogEval benchmarks, COEVO achieves state-of-the-art functional correctness while producing designs with superior PPA. Our contributions are summarized as follows: • We propose COEVO, a co-evolutionary framework for LLMbased RTL code generation that jointly optimizes functional correctness and PPA, where an adaptive correctness gate and cross-objective operators enable partially correct but PPA-promising candidates to serve as stepping stones. • We introduce 4D Pareto-based non-dominated sorting with configurable intra-level sorting to the spec-to-RTL setting, preserving PPA trade-off structure and enabling flexible preference expression without manual weight tuning. • Comprehensive experiments on the RTLLM and VerilogEval benchmarks demonstrate that COEVO achieves state-ofthe-art functional correctness while producing designs with superior PPA metrics.
2 Related Work 2.1 LLM-Based RTL Code Generation Automating RTL code generation from natural language specifications has attracted significant research attention. Domain-specific fine-tuning methods include RTLCoder [16], BetterV [20], CodeV [39], OriGen [5], and ScaleRTL [7], while reinforcement learning methods such as VeriRL [27] and VeriReason [30] incorporate compiler and simulator feedback into training. In parallel, agentic frameworks leverage general-purpose LLMs without modifying model parameters: MAGE [40] and VerilogCoder [10] decompose generation into specialized roles, VeriMoA [22] introduces quality-guided
mixture-of-agents with multi-path generation, VeriSure [13] integrates formal verification with trace-driven temporal analysis, and ACE-RTL [8] combines an RTL-specialized LLM with a frontier reasoning model. These approaches have advanced functional correctness but do not systematically improve PPA quality.
2.2
PPA-Aware RTL Design with LLMs
A growing body of work seeks to incorporate PPA optimization into LLM-based design flows. In the RTL-to-RTL setting, RTLRewriter [37] employs cost-aware MCTS for rewriting, SymRTLO [31] combines LLM-driven dispatching with symbolic reasoning, and POET [23] introduces power-oriented evolutionary optimization. These methods require a pre-existing correct implementation and do not address spec-to-RTL generation. Within the spec-to-RTL setting, in-context learning methods such as Prompt for Power [9] and LLM-VeriPPA [28] inject PPA knowledge into prompts or leverage synthesis reports. Multi-agent frameworks such as VeriOpt [26] and VeriAgent [29] assign dedicated agents for correctness and PPA optimization. Evolutionary methods including REvolution [19], EvolVE [11], and VFlow [32] maintain populations and iteratively generate, evaluate, and select designs. ChipSeek-R1 [4] incorporates hierarchical PPA reward into reinforcement learning. Despite covering diverse paradigms, these methods share the two limitations discussed in Section 1: they decouple correctness from PPA optimization and reduce multiobjective PPA to a single scalar fitness.
2.3
Evolutionary LLM Frameworks
Combining LLMs with evolutionary computation has emerged as a promising paradigm. FunSearch [25] evolves functions within program skeletons, EoH [12] co-evolves code and natural language heuristics, and EoT [24] formulates LLM reasoning as multi-objective optimization using NSGA-II [6]. In the RTL domain, REvolution [19] introduces a dual-population algorithm with adaptive UCB-Softmax operator selection, EvolVE [11] proposes Idea-Guided Refinement and MCTS with Structured Testbench Generation, and VFlow [32] searches over LLM-invoking DAGs with multi-population cooperative MCTS. A critical design choice is the fitness function for multi-objective PPA: REvolution uses a weighted sum with manual weights, EvolVE uses the area-delay product, VFlow decomposes into per-objective populations, and POET [23] adopts nondominated sorting with power-first ranking but operates in RTLto-RTL. COEVO extends non-dominated sorting to spec-to-RTL by introducing correctness as a continuous fourth Pareto dimension with configurable intra-level sorting.
3
Problem Formulation
Given a natural language hardware specification S, the goal is to generate a Verilog design that achieves both functional correctness and favorable PPA quality. Each design candidate is represented as 𝐼 = (𝑉 , 𝑐, m), where 𝑉 is the Verilog implementation, 𝑐 ∈ [0, 1] is the functional correctness score, and m = (𝐴, 𝐷, 𝑃) denotes area, critical path delay, and power from logic synthesis.
COEVO: Co-Evolutionary Framework for Joint Functional Correctness and PPA Optimization in LLM-Based RTL Generation
The ultimate objective is to find a design that is fully functionally correct while minimizing PPA: 𝐼 ∗ = arg min m(𝐼 )
s.t. 𝑐 (𝐼 ) = 1
(1)
𝐼
Existing methods treat correctness as a binary prerequisite, optimizing PPA only after 𝑐 = 1. COEVO relaxes this into an unconstrained multi-objective optimization: 𝐼 ∗ = arg min 1 − 𝑐 (𝐼 ), m(𝐼 ) (2) 𝐼
where 1 − 𝑐 captures the distance to full correctness and m is to be minimized component-wise. This relaxation allows the evolutionary process to leverage partially correct but architecturally promising candidates during the search. Collapsing correctness and PPA into a single scalar obscures trade-offs among PPA metrics and requires manual weight specification. We therefore adopt Pareto dominance to compare candidates, where 𝐼𝑎 dominates 𝐼𝑏 (𝐼𝑎 ≻ 𝐼𝑏 ) if and only if: ( 𝑐 𝑎 ≥ 𝑐𝑏 ∧ m𝑎 ≤ m𝑏 𝐼𝑎 ≻ 𝐼𝑏 ⇐⇒ (3) 𝑐 𝑎 > 𝑐𝑏 ∨ m𝑎 ≠ m𝑏 where m𝑎 ≤ m𝑏 denotes component-wise inequality (𝐴𝑎 ≤ 𝐴𝑏 ∧ 𝐷𝑎 ≤ 𝐷𝑏 ∧ 𝑃𝑎 ≤ 𝑃𝑏 ). A design is Pareto optimal if no other feasible design dominates it. This formulation places correctness and PPA into a unified objective space, enabling joint optimization rather than separate stages.
4
COEVO Framework
Figure 1 illustrates the overall architecture of COEVO. Given a specification S, the framework maintains a population of 𝑁 candidates and refines them over 𝐺 generations. Each generation consists of three stages: offspring generation, where LLM-driven operators produce 𝜆 new candidates from the current population (Section 4.1); design evaluation, where each candidate is assessed for correctness through simulation and PPA through synthesis (Section 4.2); and survivor selection, where parents and offspring are combined and reduced to 𝑁 individuals through Pareto-based selection (Section 4.3). Algorithm 1 summarizes the procedure.
4.1
Offspring Generation
4.1.1 Population Initialization. The initial population P0 is constructed to ensure broad architectural diversity, providing a wide starting basis for the evolutionary search. Given the specification S, the LLM identifies applicable architecture strategies from a predefined set K (e.g., behavioral, structural, pipeline, resource-shared, FSM-minimized). For each selected strategy 𝑠𝑘 ∈ K, ⌈𝑁 /|K |⌉ candidates are generated. 4.1.2 Evolutionary Operators. In each generation, 𝜆 offspring are produced by applying LLM-driven evolutionary operators to parents sampled from the current population. Each operator constructs a structured prompt containing the specification S, parent information, and operator-specific instructions embedding domain-specific hardware optimization knowledge. COEVO defines seven operators organized into three categories. Correctness-oriented operators include Fix and Simplify, both targeting functional improvement. Fix takes a single parent along with its diagnostic feedback (failing test cases) and instructs the
Algorithm 1 COEVO Co-Evolutionary Optimization Require: Specification S, population size 𝑁 , offspring count 𝜆, generations 𝐺, repair budget 𝑅 Ensure: Pareto-optimal design set 1: P0 ← MultiArchInit(S, 𝑁 ) 2: Evaluate all 𝐼 ∈ P0 {Section 4.2} 3: for 𝑡 = 1 to 𝐺 do 4: 𝜃 𝑡 ← AdaptiveGate(𝑡, 𝐺) {Eq. 7} 5: O𝑡 ← ∅ 6: for 𝑗 = 1 to 𝜆 do 7: Select operator 𝑎 𝑗 via UCB-Softmax {Eq. 4} 8: Select parent(s) from P𝑡 −1 9: 𝐼 ′ ← LLM(parent(s), 𝑎 𝑗 , S) 10: (𝑐 ′, m′ ) ← Evaluate(𝐼 ′ ) 11: 𝐼 ′ ← SynthRepair(𝐼 ′, S, 𝑅) {if synthesis failed} 12: O𝑡 ← O𝑡 ∪ {𝐼 ′ } 13: Update UCB reward for 𝑎 𝑗 {Eq. 5} 14: end for 15: P𝑡 ← SurvivorSelect(P𝑡 −1 ∪ O𝑡 , 𝜃 𝑡 , 𝑁 ) {Section 4.3} 16: end for 17: return Pareto front of P𝐺
LLM to correct the identified errors while preserving the overall architecture, such as repairing carry propagation logic without altering pipelining structure. Simplify reduces design complexity to escape error-prone implementations, such as replacing deeply nested conditional logic with a cleaner state machine encoding. PPA-oriented operators include Optimize, Restructure, and Explore, all targeting hardware efficiency. Optimize leverages synthesis diagnosis (critical path breakdown, power distribution) to guide targeted improvements, such as applying resource sharing when duplicated arithmetic units are identified. Restructure focuses on the critical path, applying transformations such as pipeline insertion or carry-lookahead conversion to reduce delay. Explore generates a fundamentally different architecture from the specification alone, promoting population diversity. Joint correctness-PPA operators include PPA-aware Fix and Architecture Fusion, both simultaneously addressing functional correctness and PPA. PPA-aware Fix repairs functional errors while preserving PPA-beneficial structures identified from synthesis diagnosis, such as pipelined datapaths, restricting modifications to only the logic related to failing test cases. Architecture Fusion combines two parents with complementary strengths: one contributing its correctness approach and the other its PPA optimization technique, integrating both advantages into a single offspring. 4.1.3 Adaptive Operator Selection. To balance exploration and exploitation, COEVO employs an adaptive selection mechanism based on the Upper Confidence Bound (UCB) algorithm. The selection process consists of two components: score computation and reward assignment. Operators are then sampled proportionally to their scores via softmax. For each operator 𝑎𝑖 , the selection score is: √︄ ln𝑇 Score(𝑎𝑖 ) = 𝑄 (𝑎𝑖 ) + 𝑐 (4) 𝑛𝑖
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Design Evaluation
Offspring Generation
Enhanced TestBench
Current Population
Of f spring Population
Evolutionary Operators
Evaluated Population
Cor rectness-or iented
PPA-or iented
Init. LLM
REF
Function Correct Evolutionary Operators
Select
·· ·
·· ·
Joint cor rectness-PPA
Evaluation
Function False
·· ·
Non-dominated sorting Intra-level ranking
I mplement a M ealy FSM detection circuit that detects a single-bit input I N. ......
Agent
M odule name: fsm I nput por ts: I N: I nput signal to the FSM . ...... Output por ts: M ATCH: Output signal ...... I mplementation: The module implements an FSM detection. On ever y change in the input signal (I N) ......
Ref erence
Survivor Selection
Area Delay
Select Survivor
·· ·
Sorting
Power Correctness
·· ·
0 Next Population
Evaluated Population
Non-Dominated Sorting
G
Adaptive Correctness Gate
Figure 1: Overall architecture of COEVO. The framework iteratively refines a population of design candidates through three stages: offspring generation via LLM-driven evolutionary operators, design evaluation for correctness and PPA, and survivor selection through an adaptive correctness gate followed by 4D Pareto-based non-dominated sorting. where 𝑄 (𝑎𝑖 ) is the average historical reward, 𝑛𝑖 is the selection count of 𝑎𝑖 , 𝑇 is the total selections across all operators, and 𝑐 is the exploration coefficient. The first term favors higher-reward operators (exploitation) while the second encourages less-selected ones (exploration). The reward signal is category-specific, reflecting each operator category’s optimization intent: 1 if 𝑎𝑖 ∈ A𝑐 and 𝑐 ′ > 𝑐 parent 1 if 𝑎𝑖 ∈ A𝑝 and m′ < mparent ∧ 𝑐 ′ ≥ 𝑐 parent 𝑟 (𝑎𝑖 ) = 1 if 𝑎𝑖 ∈ A 𝑗 and 𝑐 ′ > 𝑐 parent ∧ m′ < mparent 0 otherwise
(5)
where A𝑐 , A𝑝 , and A 𝑗 denote the correctness-oriented, PPA-oriented, and joint operator sets, 𝑐 ′ and m′ are the offspring’s correctness and PPA, and 𝑐 parent and mparent are the parent’s. Correctness operators are rewarded for any correctness improvement, PPA operators for PPA gains without correctness regression, and joint operators only when both objectives improve. This category-specific design enables the framework to naturally shift resource allocation from correctness-focused to PPA-focused operators as the population matures. 4.1.4 Synthesis Repair. Offspring that fail logic synthesis undergo a repair process. The synthesis error diagnosis (e.g., multi-driver conflicts, logic optimized to zero cells) is combined with the specification into a repair prompt. The repair is attempted up to 𝑅 times, and the repaired candidate replaces the original only if synthesis succeeds without correctness regression.
4.2.1 Fine-Grained Correctness Evaluation. A key enabler of coevolutionary optimization is measuring functional correctness as a continuous quantity rather than a binary outcome. We construct an enhanced testbench for each design that provides both a continuous score and detailed diagnostic feedback. The enhanced testbench is generated by analyzing the specification with the LLM to derive comprehensive test scenarios covering boundary conditions, typical operations, and corner cases. Input stimuli are simulated through a golden reference implementation provided by the benchmark to obtain expected outputs, forming a set of 𝑇 test cases. The correctness score is defined as: 𝑐 (𝐼 ) =
Design Evaluation
Each candidate is evaluated along two dimensions: functional correctness and PPA quality.
(6)
where 𝑝 (𝐼 ) is the number of passed test cases. For each failing case, the testbench reports the expected and actual signal values, providing actionable diagnostic feedback for the evolutionary operators and the repair mechanism. 4.2.2 PPA Evaluation. Each candidate is submitted to logic synthesis to obtain PPA metrics m(𝐼 ) = (𝐴, 𝐷, 𝑃) representing area, critical path delay, and power. The synthesis log is parsed to extract a structured diagnosis including cell count, critical path composition, and resource utilization, which serves as optimization guidance for PPA-oriented operators. Candidates that fail synthesis are assigned m = ⊥; during non-dominated sorting (Section 4.3), such candidates are treated as dominated on all PPA dimensions, effectively relegating them to lower Pareto levels while still allowing their correctness score to influence selection.
4.3 4.2
𝑝 (𝐼 ) 𝑇
Survivor Selection
After evaluation, the combined candidate pool P𝑡 −1 ∪ O𝑡 is reduced to 𝑁 survivors to form the next-generation population P𝑡 . This process consists of two stages: adaptive correctness gating and 4D
COEVO: Co-Evolutionary Framework for Joint Functional Correctness and PPA Optimization in LLM-Based RTL Generation
Pareto-based non-dominated sorting with configurable intra-level ranking. 4.3.1 Adaptive Correctness Gate. At each generation 𝑡, an adaptive threshold 𝜃 𝑡 determines the minimum correctness required for a candidate to enter the selection pool: 𝑡 𝛼 𝜃 𝑡 = 𝜃 min + (𝜃 max − 𝜃 min ) · (7) 𝐺 where 𝜃 min and 𝜃 max define the threshold range and 𝛼 controls the annealing schedule. The gated candidate pool is defined as: P 𝜃 = {𝐼 ∈ P𝑡 −1 ∪ O𝑡 | 𝑐 (𝐼 ) ≥ 𝜃 𝑡 }
5.1 (8)
The rationale behind this annealing mechanism is twofold. In early generations, the threshold is set low, allowing partially correct candidates with promising architectural characteristics to survive and influence the population’s evolutionary direction. This is critical because a design that passes most test cases while exhibiting favorable PPA may carry architectural insights that benefit subsequent generations through crossover and mutation. As evolution progresses, the threshold gradually increases, steering the population toward full correctness. This smooth transition avoids the abrupt information loss caused by a hard binary correctness gate, which would immediately discard all partially correct candidates regardless of their architectural quality. 4.3.2 Pareto-Based Non-Dominated Sorting. The gated pool P 𝜃 is reduced to 𝑁 survivors to form P𝑡 through three steps: (1) Non-dominated sorting. The pool is partitioned into Pareto levels F1, F2, . . . , F𝐿 via the dominance relation ≻ (Eq. 3), where F1 is the Pareto front and subsequent levels represent lower quality. This 4D formulation handles the interplay between correctness and PPA: a candidate with 𝑐 = 0.95 and strong PPA may be nondominated with respect to a candidate with 𝑐 = 1.0 and moderate PPA, preserving both as viable evolutionary building blocks. (2) Intra-level ranking. Within each Pareto level F𝑘 , individuals are ranked according to a configurable criterion. The default is correctness in descending order, but the criterion can be set to any PPA metric (e.g., power in ascending order for power-oriented optimization) or a secondary non-dominated sorting on a subset of objectives. This configurability allows the framework to express different optimization preferences without modifying its overall structure. (3) Proportional slot allocation. Survivors are allocated across Pareto levels proportionally to their priority. Each level F𝑘 receives a number of slots determined by its weight 𝑤𝑘 = 1/(𝑘 + 1): ! 𝑤𝑘 𝑠𝑘 = round Í𝐿 ·𝑁 (9) 𝑙=1 𝑤𝑙 Higher-priority levels receive more slots, concentrating selection pressure on the Pareto front while retaining representatives from lower levels for diversity. Slots within each level are filled according to the intra-level ranking. When a level contains fewer candidates than its allocated slots, the surplus cascades to the next level.
5
RQ1: How does COEVO compare with existing agentic and trainingbased methods in functional correctness? RQ2: How well does COEVO perform in PPA optimization compared to existing methods on synthesizable designs? RQ3: What is the contribution of each core component to the overall performance? RQ4: How does the co-evolutionary process jointly optimize correctness and PPA over generations?
Experiments
We conduct comprehensive experiments to evaluate COEVO by addressing four research questions:
Experimental Setup
Benchmarks. We evaluate on two standard spec-to-RTL benchmarks: VerilogEval 2.0 [21] (156 design tasks covering combinational and sequential circuits) and RTLLM 2.0 [18] (50 design tasks spanning arithmetic modules, control logic, and datapath circuits). During our experiments, we identified and corrected a small number of specification ambiguities and testbench inconsistencies in both benchmarks to ensure fair evaluation across all methods. LLM Backbones. For the agentic method comparison, we evaluate with four OpenAI models: GPT-4o-mini, GPT-4.1-mini, GPT-5-mini, and GPT-5.4-mini. To compare with training-based methods that operate on smaller open-source models, we additionally evaluate COEVO with Qwen2.5-Coder-7B. All baselines are evaluated under the same backbone for fair comparison. Baselines. For functional correctness evaluation (RQ1), we compare against two categories of methods. Among agentic methods, we include I/O prompting, VeriOpt [26], VeriAgent [29], VerilogCoder [10], VeriMoA [22], REvolution [19], and EvolVE [11]. Among training-based methods, we include SFT models (RTLCoder [16], OriGen [5], HaVen [36]) and SFT+RL models (VeriRL [27], QiMengSALV [38], CodeV-R1 [41]). For PPA comparison (RQ2), we compare against EvolVE, VeriAgent, and REvolution on RTLLM 2.0 using GPT-5.4-mini as the backbone. Evaluation Metrics. Functional correctness is measured by Pass@𝑘 (𝑘 ∈ {1, 5, 10}) computed over 𝑁 = 10 independent runs per design using the original benchmark testbenches, following the standard unbiased estimator [22]. PPA quality is evaluated through logic synthesis using Yosys and power analysis using OpenSTA with the NanGate 45nm standard cell library. We report area (𝜇m2 ), critical path delay (ns), and power (𝜇W). Hyperparameters. COEVO uses population size 𝑁 = 10, offspring count 𝜆 = 10, maximum generations 𝐺 = 10, and repair budget 𝑅 = 3. The adaptive gate parameters are 𝜃 min = 0.25, 𝜃 max = 1.0, 𝛼 = 2.0. The UCB exploration coefficient is 𝑐 = 2.0. All LLM calls use temperature 0.8 and top_p 0.95.
5.2
Functional Correctness (RQ1)
Comparison with Agentic Methods. Table 1 presents the functional correctness comparison across four LLM backbones on VerilogEval 2.0 and RTLLM 2.0. COEVO achieves the highest Pass@𝑘 across all backbone and benchmark configurations. With GPT-5.4mini, COEVO attains 97.5% Pass@1 on VerilogEval 2.0, surpassing the strongest baseline EvolVE by 1.7 percentage points. On the more challenging RTLLM 2.0 benchmark, the improvement is particularly pronounced: COEVO consistently outperforms the secondbest method by 5.1 to 6.4 points in Pass@1 across all four backbones,
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Table 1: Functional correctness comparison with agentic methods across four LLM backbones. All values are reported as Pass@𝑘 (%). Bold indicates the best result per backbone. Green numbers indicate improvement over I/O prompting. GPT-4o-mini
GPT-4.1-mini
Method
VerilogEval 2.0 (%) Pass@1 Pass@5 Pass@10
RTLLM 2.0 (%) Pass@1 Pass@5 Pass@10
I/O VeriOpt VeriAgent VerilogCoder VeriMoA REvolution EvolVE COEVO
52.4 60.7 ↑8.3 72.4 ↑20.0 74.2 ↑21.8 73.4 ↑21.0 77.9 ↑25.5 80.7 ↑28.3 86.5 ↑34.1
47.2 56.4 ↑9.2 67.9 ↑20.7 68.2 ↑21.0 69.6 ↑22.4 74.7 ↑27.5 78.1 ↑30.9 83.2 ↑36.0
Method
VerilogEval 2.0 (%) Pass@1 Pass@5 Pass@10
I/O VeriOpt VeriAgent VerilogCoder VeriMoA REvolution EvolVE COEVO
64.2 78.2 ↑14.0 84.9 ↑20.7 89.2 ↑25.0 88.1 ↑23.9 90.4 ↑26.2 93.9 ↑29.7 95.1 ↑30.9
65.2 66.4 ↑1.2 77.8 ↑12.6 79.9 ↑14.7 80.5 ↑15.3 82.8 ↑17.6 85.6 ↑20.4 88.4 ↑23.2
68.6 71.9 ↑3.3 80.8 ↑12.2 81.3 ↑12.7 82.6 ↑14.0 83.8 ↑15.2 87.5 ↑18.9 89.2 ↑20.6
Method
VerilogEval 2.0 (%) Pass@1 Pass@5 Pass@10
Pass@1
I/O VeriOpt VeriAgent VerilogCoder VeriMoA REvolution EvolVE COEVO
62.8 74.2 ↑11.4 82.1 ↑19.3 85.8 ↑23.0 86.0 ↑23.2 89.3 ↑26.5 91.3 ↑28.5 94.4 ↑31.6
57.6 67.4 ↑9.8 74.3 ↑16.7 76.1 ↑18.5 77.5 ↑19.9 80.5 ↑22.9 83.8 ↑26.2 90.2 ↑32.6
RTLLM 2.0 (%) Pass@1 Pass@5 Pass@10
Method
VerilogEval 2.0 (%) Pass@1 Pass@5 Pass@10
Pass@1
58.5 71.5 ↑13.0 77.1 ↑18.6 78.4 ↑19.9 80.3 ↑21.8 82.4 ↑23.9 85.4 ↑26.9 92.1 ↑33.6
I/O VeriOpt VeriAgent VerilogCoder VeriMoA REvolution EvolVE COEVO
66.8 81.2 ↑14.4 92.2 ↑25.4 94.1 ↑27.3 93.8 ↑27.0 93.5 ↑26.7 95.8 ↑29.0 97.5 ↑30.7
64.4 80.0 82.0 76.3 ↑11.9 83.6 ↑3.6 84.2 ↑2.2 83.2 ↑18.8 86.2 ↑6.2 88.1 ↑6.1 82.8 ↑18.4 86.3 ↑6.3 88.9 ↑6.9 84.2 ↑19.8 88.3 ↑8.3 89.8 ↑7.8 85.4 ↑21.0 88.6 ↑8.6 90.6 ↑8.6 88.2 ↑23.8 92.1 ↑12.1 93.4 ↑11.4 94.5 ↑30.1 96.9 ↑16.9 97.6 ↑15.6
61.3 62.3 ↑1.0 73.0 ↑11.7 74.4 ↑13.1 76.3 ↑15.0 78.3 ↑17.0 80.8 ↑19.5 87.2 ↑25.9
64.0 68.0 ↑4.0 76.3 ↑12.3 76.7 ↑12.7 78.2 ↑14.2 80.4 ↑16.4 82.6 ↑18.6 88.6 ↑24.6
78.5 82.7 81.8 ↑3.3 84.9 ↑2.2 85.3 ↑6.8 89.8 ↑7.1 88.1 ↑9.6 91.6 ↑8.9 90.3 ↑11.8 92.1 ↑9.4 91.1 ↑12.6 92.4 ↑9.7 93.3 ↑14.8 95.2 ↑12.5 96.8 ↑18.3 97.4 ↑14.7
GPT-5-mini
79.7 82.2 ↑2.5 88.6 ↑8.9 92.3 ↑12.6 91.4 ↑11.7 92.5 ↑12.8 95.1 ↑15.4 97.2 ↑17.5
83.6 86.7 ↑3.1 90.7 ↑7.1 94.1 ↑10.5 93.2 ↑9.6 94.9 ↑11.3 96.7 ↑13.1 97.9 ↑14.3
RTLLM 2.0 (%) Pass@5 Pass@10 70.7 74.1 ↑3.4 77.5 ↑6.8 81.2 ↑10.5 82.2 ↑11.5 83.3 ↑12.6 86.2 ↑15.5 93.7 ↑23.0
74.0 76.8 ↑2.8 81.9 ↑7.9 83.3 ↑9.3 84.7 ↑10.7 85.7 ↑11.7 88.7 ↑14.7 94.2 ↑20.2
GPT-5.4-mini
71.6 74.5 ↑2.9 81.3 ↑9.7 82.7 ↑11.1 84.1 ↑12.5 85.9 ↑14.3 88.5 ↑16.9 94.8 ↑23.2
76.0 79.9 ↑3.9 83.9 ↑7.9 84.6 ↑8.6 86.5 ↑10.5 88.2 ↑12.2 90.9 ↑14.9 95.7 ↑19.7
81.2 89.7 ↑8.5 93.8 ↑12.6 95.8 ↑14.6 95.2 ↑14.0 94.7 ↑13.5 97.2 ↑16.0 98.8 ↑17.6
85.9 87.9 ↑2.0 95.7 ↑9.8 96.4 ↑10.5 96.1 ↑10.2 96.9 ↑11.0 97.8 ↑11.9 99.3 ↑13.4
RTLLM 2.0 (%) Pass@5 Pass@10
Table 2: Comparison with training-based methods. All training-based models use 7B-scale open-source LLMs. COEVO uses the same Qwen2.5-Coder-7B backbone without any fine-tuning. First , second , and third best results are highlighted.
Model
SFT
SFT+RL Agentic
RTLCoder-Mistral RTLCoder-DeepSeek-Coder OriGen-DeepSeek-Coder HaVen-CodeQwen1.5 VeriRL-DeepSeek-Coder VeriRL-CodeQwen2.5 QiMeng-SALV CodeV-R1 COEVO (Qwen2.5-Coder-7B)
Size
VerilogEval 2.0 (%)
RTLLM 2.0 (%)
Pass@1
Pass@5
Pass@10
Pass@1
Pass@5
Pass@10
35.6 39.7 51.2 55.4 64.6 66.3 64.4 68.6 72.7
37.7 46.0 56.8 62.8 71.8 73.4 74.9 78.5 77.8
45.2 53.4 61.7 68.7 74.3 75.9 77.2 81.4 80.2
38.7 40.8 41.1 51.0 58.6 61.5 61.8 68.4 74.5
41.8 49.8 58.5 60.9 66.3 68.9 71.4 79.2 80.8
47.6 54.7 62.7 64.3 68.8 71.1 76.2 82.1 84.2
7B 6.7B 7B 7B 6.7B 7B 7B 7B 7B
indicating that the co-evolutionary mechanism is especially effective on complex designs where correctness and architectural quality are more tightly coupled. The advantage of COEVO is consistent across LLM backbones. Even with the weakest backbone GPT-4o-mini, COEVO achieves 86.5% Pass@1 on VerilogEval 2.0, outperforming EvolVE (80.7%) by 5.8 points and REvolution (77.9%) by 8.6 points. Notably, COEVO with GPT-4o-mini (86.5% on VerilogEval 2.0) surpasses all baselines using the stronger GPT-4.1-mini backbone except EvolVE (91.3%), demonstrating that the framework’s architectural innovations can partially compensate for weaker LLM capability. As the backbone strengthens, COEVO continues to scale effectively, reaching 99.3% Pass@10 on VerilogEval 2.0 with GPT-5.4-mini. Comparison with Training-Based Methods. Table 2 compares COEVO against SFT and SFT+RL methods, all operating on 7Bscale open-source models. Without any fine-tuning, COEVO with Qwen2.5-Coder-7B achieves 72.7% Pass@1 on VerilogEval 2.0 and
74.5% on RTLLM 2.0, outperforming all training-based baselines including CodeV-R1 (68.6% and 68.4%), the strongest SFT+RL method, by 4.1 and 6.1 points respectively. This result demonstrates that COEVO’s inference-time evolutionary optimization can surpass the gains from domain-specific model training, while remaining complementary to training-based approaches since fine-tuned models can serve as the backbone LLM within the COEVO framework.
5.3
PPA Quality (RQ2)
Table 3 presents the per-design PPA comparison on RTLLM 2.0 using GPT-5.4-mini. Among 49 designs (excluding unsynthesizable clk_generator), COEVO produces functionally correct and synthesizable designs for 48, compared to 46 for EvolVE, 44 for VeriAgent, and 45 for REvolution. On designs such as freq_divbyfrac, all three baselines fail to produce a correct design, while COEVO succeeds, demonstrating that the co-evolutionary framework maintains functional correctness while pursuing PPA optimization.
COEVO: Co-Evolutionary Framework for Joint Functional Correctness and PPA Optimization in LLM-Based RTL Generation
Table 3: Per-design PPA comparison on RTLLM 2.0 using GPT-5.4-mini. Green indicates the best PPA product (𝐴 × 𝐷 × 𝑃) per design. ✗ indicates no functionally correct and synthesizable design was produced. Reference Area Delay Power JC_counter 340.48 0.10 299 25.00 0.14 26.7 LFSR LIFObuffer 228.23 0.34 372 474.81 0.22 607 RAM ROM 21.81 0.21 10.1 accu 230.62 0.49 726 adder_16bit 96.82 0.59 61.5 adder_32bit 208.54 0.87 138 adder_8bit 48.94 0.31 29.0 42.83 0.31 36.5 adder_bcd adder_pipe_64bit 2529.39 0.83 2910 1952.97 1.93 847 alu asyn_fifo 1099.91 0.33 1600 barrel_shifter 39.37 0.17 14.1 164.12 0.42 136 calendar comparator_3bit 11.97 0.15 5.69 comparator_4bit 18.89 0.16 8.91 counter_12 34.85 0.24 98.6 div_16bit 737.62 5.64 22600 edge_detect 18.35 0.12 18.4 472.95 1.23 401 fixed_point_adder fixed_point_subtractor 587.86 1.24 487 float_multi 5980.48 2.32 65900 freq_div 116.24 0.39 110 freq_divbyeven 31.65 0.21 43.7 48.41 0.20 40.1 freq_divbyfrac freq_divbyodd 58.52 0.62 64.7 fsm 45.49 0.18 52.4 instr_reg 117.04 0.16 129 multi_16bit 951.48 1.98 1250 525.35 1.62 852 multi_8bit multi_booth_8bit 414.96 0.79 598 multi_pipe_4bit 171.57 0.34 189 multi_pipe_8bit 866.36 0.79 854 parallel2serial 48.68 0.20 46.3 3649.52 1.72 35700 pe pulse_detect 29.26 0.15 34.9 414.43 0.59 362 radix2_div right_shifter 36.18 0.08 37.5 ring_counter 46.82 0.10 56.2 36.44 0.15 38.6 sequence_detector 156.14 0.41 219 serial2parallel 69.16 0.37 26.5 signal_generator square_wave 102.14 0.48 252 406.45 2.16 272 sub_64bit synchronizer 65.97 0.17 59.9 traffic_light 161.20 0.37 538 219.45 0.67 689 up_down_counter width_8to16 186.73 0.25 319
EvolVE Area Delay Power 340.48 0.10 299 24.47 0.16 27.2 228.23 0.34 372 470.82 0.24 608 21.81 0.21 10.1 230.62 0.49 726 96.82 0.59 61.5 239.40 0.64 158 55.06 0.27 34.1 33.52 0.29 31.8 1480.82 1.07 1630 1190.35 1.74 578 ✗ ✗ ✗ 39.10 0.17 16.0 168.38 0.39 136 13.83 0.08 6.13 17.02 0.12 8.19 34.85 0.24 98.6 747.46 5.33 25700 18.35 0.12 18.4 464.70 0.98 385 582.27 1.13 479 4846.25 2.07 41300 91.24 0.32 95.9 38.57 0.27 43.9 ✗ ✗ ✗ ✗ ✗ ✗ 36.97 0.13 42.5 117.04 0.16 129 530.14 0.79 1920 525.35 1.62 852 414.43 0.78 600 171.57 0.34 189 926.48 0.47 1770 48.68 0.20 46.3 3649.52 1.72 35700 29.26 0.15 34.9 286.75 0.35 858 36.18 0.08 37.5 46.82 0.10 56.2 27.40 0.22 36.4 163.86 0.52 169 69.96 0.33 26.6 102.41 0.48 268 411.77 2.09 276 65.97 0.17 59.9 161.20 0.37 538 219.45 0.67 689 186.73 0.24 319
Design
Func. Pass (/49)
Count (/40)
48 40 30 20 10 0
VeriAgent Area Delay Power 340.48 0.10 299 24.47 0.16 27.2 227.70 0.36 271 447.68 0.32 454 21.81 0.21 10.1 218.39 0.49 693 97.89 0.57 60.1 191.79 1.03 119 55.06 0.27 34.1 32.45 0.28 32.9 1480.82 1.07 1630 1280.79 1.35 643 ✗ ✗ ✗ 39.10 0.17 16.0 152.42 0.38 136 11.70 0.10 5.24 17.29 0.12 7.60 34.85 0.24 98.6 748.79 5.40 24300 18.09 0.11 18.4 464.70 0.98 385 508.06 1.37 420 4846.25 2.07 41300 91.24 0.30 95.8 ✗ ✗ ✗ ✗ ✗ ✗ ✗ ✗ ✗ 25.80 0.18 27.4 117.04 0.16 129 530.14 0.79 1920 345.27 1.19 1360 417.89 0.75 574 171.57 0.29 196 866.36 0.79 854 47.88 0.16 56.8 3649.52 1.72 35700 28.73 0.25 15.5 ✗ ✗ ✗ 36.18 0.08 37.5 46.82 0.10 56.2 27.40 0.22 36.4 156.14 0.41 219 67.30 0.34 26.5 102.14 0.48 252 404.59 2.08 255 60.65 0.17 55.2 161.20 0.37 538 219.45 0.67 689 186.73 0.25 319
46
43
37
6 O Full COEV
6
18 7
5 S
w/o 4D ND
PPA Win (/49)
47
11
nced Testb w/o Enha
32 6
ench
PPA Tie (/49) 45
34
31
26
REvolution COEVO Area Delay Power Area Delay Power 340.48 0.10 299 340.48 0.10 299 24.47 0.16 27.2 25.00 0.14 26.7 227.70 0.36 271 197.90 0.39 226 447.68 0.32 454 435.97 0.31 420 20.22 0.15 14.7 20.22 0.15 14.7 217.85 0.49 680 231.95 0.49 152 97.89 0.57 60.1 93.90 0.55 61.9 239.40 0.64 158 191.79 1.02 119 55.06 0.27 34.1 55.06 0.27 34.1 33.52 0.29 31.8 32.19 0.28 31.0 1480.82 1.07 1630 994.31 0.66 1100 1191.15 1.52 566 1219.08 1.44 592 ✗ ✗ ✗ ✗ ✗ ✗ 39.10 0.17 16.0 39.10 0.17 16.0 168.38 0.39 136 139.65 0.38 127 13.83 0.08 6.13 11.70 0.09 5.22 17.02 0.12 8.19 16.49 0.11 7.09 34.85 0.24 98.6 35.91 0.16 109 747.46 5.33 25700 737.62 5.64 22600 18.09 0.11 18.4 12.77 0.10 10.2 472.95 1.23 401 469.76 0.98 394 582.27 1.13 479 520.03 0.99 401 4846.25 2.07 41300 4234.99 3.47 23900 91.24 0.32 95.9 82.19 0.34 72.3 ✗ ✗ ✗ 19.15 0.17 21.7 ✗ ✗ ✗ 30.32 0.21 38.2 ✗ ✗ ✗ 58.52 0.62 64.7 36.97 0.13 42.5 26.07 0.14 20.8 117.04 0.16 129 117.31 0.14 129 530.14 0.79 1920 560.73 0.74 747 329.04 0.74 455 330.37 0.74 450 417.89 0.75 574 265.20 0.71 186 149.23 0.31 175 163.59 0.28 173 866.36 0.79 854 924.08 0.48 911 44.16 0.19 41.4 19.95 0.16 25.8 3651.91 1.70 35600 3392.83 1.72 30100 11.70 0.10 9.81 6.65 0.12 5.15 286.75 0.35 858 414.43 0.59 362 36.18 0.08 37.5 36.18 0.08 37.5 46.82 0.10 56.2 32.45 0.18 30.1 36.44 0.15 38.6 23.14 0.14 22.2 156.14 0.41 219 154.01 0.33 157 61.18 0.31 26.4 38.84 0.22 18.5 97.62 0.47 257 88.84 0.45 257 404.05 2.07 254 498.48 0.87 324 55.33 0.17 50.4 50.01 0.14 45.2 161.20 0.37 538 132.73 0.38 562 184.34 0.55 583 160.40 0.50 372 186.73 0.24 319 180.88 0.24 311
w/o Joint
32 7 10
9
Operators
PPA Lose (/49)
47
ve Gate
w/o Adapti
6
11
Arch Init
w/o Multi-
Figure 2: Ablation study on RTLLM 2.0 using GPT-5.4-mini. Each group of bars reports Func. Pass, PPA Win, PPA Tie, and PPA Lose (out of 49 designs) against the best baseline per design. We evaluate PPA quality using the composite metric 𝐴 × 𝐷 × 𝑃 [29], where lower values indicate better overall efficiency. COEVO
achieves the best PPA product on 43 out of 49 designs, substantially outperforming the reference implementations (8), REvolution (5),
Ping et al.
70
Operator: Restructure FSM shift-register matching
50
Operator: PPA-aware Fix Fix bugs, preserve PPA
40
Operator: Structural Init Generate initial RTL design
30 20 10 0 00
21.5
23.8
27.8
16.4
1
2
46.9
43.3
43.3
27.8 18.2
18.2
46.9
18.2 16.4
3
4
16.7
5
1.000 58.3
58.3
Operator: Optimize Bit-level: eq AND/NOT
42.7
42.7
22.2
22.2
6
7
0.8 0.6 0.4 0.2
16.7
Generation
1.0
Correctness Score
PPA Improvement (%)
60
1.000
Corr. Power Delay Area 0.864
8
9
10
0.0
Figure 3: Co-evolutionary trajectory of COEVO on fsm from RTLLM 2.0. The left axis shows PPA improvement (%) over the reference design for area, delay, and power. The right axis shows the correctness score. Key evolutionary operators and their effects are annotated at each transition point. VeriAgent (3), and EvolVE (4). The advantage is particularly evident on designs where targeted optimization yields significant gains: for accu, COEVO reduces power by 79.1% over the reference while maintaining comparable area and delay, demonstrating the ability to exploit specific optimization opportunities through PPA-oriented operators guided by synthesis diagnosis. For fsm, COEVO achieves 42.7% area, 22.2% delay, and 60.3% power reduction simultaneously, illustrating how the co-evolutionary mechanism enables broad architectural restructuring while preserving correctness through the adaptive gate and joint operators. These improvements stem from the core design of COEVO: allowing PPA-promising candidates with partial correctness to survive and guide the population toward architecturally superior solutions that are subsequently refined to full correctness. The 4D Pareto-based selection further enables COEVO to preserve diverse trade-off solutions across area, delay, and power without collapsing into a single scalar, avoiding the premature convergence caused by weighted-sum fitness aggregation used in existing evolutionary methods.
w/o 4D NDS causes the largest PPA degradation (Win: 37→26, Lose: 6→18), which confirms that 4D Pareto-based non-dominated sorting is the most critical component: collapsing PPA into a single scalar prevents the framework from preserving trade-off diversity across area, delay, and power, leading to suboptimal selection decisions throughout the evolutionary process. w/o Enhanced Testbench produces the largest correctness drop (Func. Pass: 48→43, PPA Win: 37→31), as the reduced test case coverage and coarser diagnostic feedback weaken the guidance available to evolutionary operators while diminishing the discriminative power of correctness as a Pareto dimension. w/o Adaptive Gate and w/o MultiArch Init both reduce PPA Win to 32, where removing the gate allows low-quality candidates to dilute selection pressure (Func. Pass: 48→45) and removing diverse initialization limits the starting architectural coverage (Func. Pass: 48→47). w/o Joint Operators shows the smallest degradation (PPA Win: 37→34, Func. Pass: 48→47), indicating that the remaining operators can address correctness and PPA, though the absence of cross-objective operators weakens the coupling between the two objectives.
5.4
5.5
Ablation Study (RQ3)
We evaluate five ablation configurations on RTLLM 2.0 using GPT5.4-mini, each removing one component from the full COEVO framework: (1) w/o 4D NDS, replacing 4D non-dominated sorting with binary correctness split and weighted-sum PPA fitness; (2) w/o Enhanced Testbench, using the original benchmark testbench with fewer test cases and less detailed feedback; (3) w/o Joint Operators, removing PPA-aware Fix and Architecture Fusion; (4) w/o Adaptive Gate, removing the correctness threshold so all candidates directly enter non-dominated sorting; and (5) w/o Multi-Arch Init, using only a single behavioral strategy for initialization. Figure 2 reports Func. Pass and PPA Win/Tie/Lose counts out of 49 designs, where each design is compared against the best result among all baselines and designs that fail functional correctness are counted as PPA Lose.
Case Study (RQ4)
Figure 3 traces the co-evolutionary trajectory on the fsm design from RTLLM 2.0. In generation 1, Structural Init produces a fivestate FSM with 𝑐 = 0.864 and PPA improvements of 18.2% area, 23.8% delay, and 21.5% power. This partially correct candidate survives through the adaptive correctness gate and propagates its architectural advantages to subsequent generations, embodying the co-evolutionary principle where PPA-promising designs serve as stepping stones rather than being discarded. In generation 2, PPA-aware Fix repairs the transition logic to 𝑐 = 1.0 with minimal structural changes, preserving the inherited PPA quality. In generation 5, Restructure replaces the FSM with shift-registerbased pattern matching, yielding area (43.3%) and power (46.9%) gains through broad architectural exploration. In generation 8, Optimize decomposes the comparator into AND/NOT gate-level logic,
COEVO: Co-Evolutionary Framework for Joint Functional Correctness and PPA Optimization in LLM-Based RTL Generation
pushing power to 58.3% and delay to 22.2% through fine-grained circuit refinement. This trajectory demonstrates how COEVO’s co-evolutionary mechanisms work in concert: the adaptive gate preserves promising candidates, joint operators bridge correctness and PPA, and the evolutionary search naturally transitions from functional repair to architectural optimization.
6
Conclusion
We presented COEVO, a co-evolutionary framework for LLM-based RTL code generation that jointly optimizes functional correctness and PPA within a unified evolutionary loop. An enhanced testbench enables continuous correctness scoring, which serves as the foundation for formulating correctness as a co-optimization dimension alongside area, delay, and power. This continuous formulation overcomes the decoupled optimization limitation shared by existing methods. An adaptive correctness gate with annealing allows partially correct but architecturally promising candidates to guide the evolutionary search, while cross-objective operators strengthen the coupling between correctness and PPA. To overcome single-objective scalarization, COEVO employs four-dimensional Pareto-based non-dominated sorting with configurable intra-level sorting, preserving PPA trade-off structure without manual weight tuning. Experiments on VerilogEval 2.0 and RTLLM 2.0 demonstrate that COEVO achieves state-of-the-art functional correctness across four LLM backbones, while attaining the best PPA on 43 out of 49 synthesizable RTLLM designs. Ablation studies confirm the contribution of each component, and a case study illustrates the co-evolutionary dynamics.
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