arXiv CSopen access

Energy-Aware Computing in the Year 2026

Energy-Aware Computing in the Year 2026 Roblex Nana Tchakoutea,∗,1 , Claude Tadonkia a Mines Paris - PSL University

arXiv:2605.24569v1 [cs.DC] 23 May 2026

Centre de Recherche en Informatique, 35 rue Saint-Honoré, Fontainebleau, 77300, France

ARTICLE INFO

ABSTRACT

Keywords: Energy-Aware Computing Cloud-Edge Continuum High-Performance Computing (HPC) Green AI Carbon Footprint Power Capping Job Scheduling Energy Efficiency

High-Performance Computing (HPC) has recently entered the Exascale era, and considerable efforts are underway to fully harness this power for large-scale applications, such as cutting-edge generative AI (training and exploitation). The corresponding energy consumption is very high, and forecasts are alarming, making this metric a critical systemic bottleneck. Addressing this issue presents a genuine challenge for the entire cloud-edge-HPC continuum at all scales, from low-power IoT microcontrollers to multi-megawatt data centers. Beyond financial costs, green computing is driven by considerations related to climate change and environmental concerns such as carbon footprint (𝐶𝑂2 𝑒), as well as constraints on energy production and supply, leading to a real need to regulate information and communication technology (ICT) activities. This article presents a comprehensive overview of energy-efficient computing, incorporating the most recent and significant contributions. Based on this exploration of the state of the art, we design and describe a holistic taxonomy of the aforementioned publications, structured around various perspectives, including hardware and software aspects, measurement instrumentation, software optimizations, dynamic task scheduling, voltage scaling, workload consolidation, federated learning, and cooling. Particular emphasis is placed on large-scale AI, which receives significant attention due to its considerable resource requirements. We conclude with an analysis of a forward-looking roadmap that considers the main perspectives of sustainable computing.

1. Introduction The trajectory of computer architecture has long been shaped by two foundational principles: Moore’s Law, which predicted the doubling of transistor density every two years, and Dennard Scaling, which ensured that total chip power remained roughly constant as transistors shrank. Together, these laws underpinned decades of increasing performance gains at manageable energy costs, which is no longer the case due to the fundamental power wall that now governs the design and operation of modern computing infrastructures. In addition to theoretical peak performance, an important focus is now on energy production/supply, heat dissipation, and environmental sustainability [1]. The Exascale era, currently led by landmark systems including El Capitan (≈30 MW), Frontier (≈25 MW), Aurora (≈39 MW), JUPITER Booster (≈16 MW) [2], has pushed facility power draws to unprecedented levels, making electricity and cooling costs the dominant factor in total cost of ownership (TCO). At this scale, even marginal improvements in energy efficiency translate directly into significant financial savings and a noticeable reduction in carbon emissions. The emergence of Generative Artificial Intelligence (GenAI) and Large Language Models (LLMs) has significantly exacerbated the (projected) energy crisis [3]. Training trillion-parameter models requires large-scale clusters that run continuously for several months. High-performance AI is currently powered by high-end accelerators with thermal design powers (TDPs) greater than 1000W per chip (e.g., NVIDIA Blackwell, AMD MI300X) [4, 5]. Thus, mitigating ∗ Corresponding author

∗∗ Principal corresponding author

ORCID (s): 0009-0009-8636-8466 (R.N. Tchakoute)

R.N. Tchakoute and C. Tadonki: Preprint submitted to Elsevier

the energy requirement and the carbon footprint associated with large-scale AI has become a top priority [6]. Intelligent applications are increasingly migrating toward the "Edge" in order to reduce latency. This introduces a two-way energy context: embedded systems and the Internet of Things (IoT). Here, energy is a critical resource. Microcontrollers and embedded AI accelerators (e.g., Coral Dev Boards, Nvidia Jetson) must run inference tasks within milliwatt-scale power limits in order to cope with the limited energy budget, since they are battery-powered. Thus, modern computing ecosystems must be evaluated as a unified Cloud-Edge-HPC continuum. Historically, power efficiency was hardware-centric. However, achieving true sustainability requires a cross-stack approach that combines hardware optimizations with advanced system-level mechanisms such as energy-aware job scheduling, dynamic resource allocation, and intelligent power capping [7]. Evaluating Sustainable AI inherently requires balancing its predictive capabilities with the ecological consequences of its carbon footprint [8, 9]. Recent meta-synthesis studies have demonstrated a crucial need for sustainability-related investigations, and most qualitative surveys have focused on the suitability of all-inclusive approaches in which all energy-accountable hardware and software aspects are analyzed as a whole [10]. Concerns related to the energy consumption of IT activities can/should be considered from a broader perspective, including the three main phases: energy production, ITrelated activities, and disposal/recycling, as illustrated in Figure 1. Energy-efficient computing, in all its aspects and paradigms, is associated to the intermediate phase only, and this survey describes the landscape of related contributions.

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Energy-Aware Computing in 2026

Figure 1: The whole cycle of energy consumption and related consequences.

This paper aims to provide a structured and commented view of the landscape of the major scientific and technical contributions within the state-of-the-art of power-aware computing in the Computing continuum. We provide and articulate the following viewpoints: • Comprehensive Taxonomy: An up-to-date taxonomy of energy-related studies spanning edge microcontrollers, cloud computing infrastructures, AI accelerators, and Exascale supercomputers. • Cross-Stack Profiling: A comparative analysis of hardware and software energy profiling tools, distinguishing between in-band estimations and out-ofband measurements. • Code Optimization: A review of static and dynamic energy optimization strategies, with an emphasis on job scheduling, power capping, and workload consolidation. • Sustainable AI: An explicit focus on the carbon footprint of cutting-edge/large-scale AI through the review of frameworks for tracking and mitigation of energy-related metrics associated to LLM training and inference. • Cooling and conventional rules: An evaluation of liquid cooling technologies and a prospective analysis of conventional rules and technical challenges related to sustainable computing.

chose an objective filtering pipeline that covers the full Cloud-to-Edge continuum, integrating chronological bibliometric dynamics and high-impact industrial reports.

2.1. Popularity-Driven Filtering and Selection Our starting pool is a set of highly cited papers that explicitly focus on sustainable hpc-cloud-Edge computing, cutting-edge AI workloads, power capping, and hardware telemetry. Among these contributions, we selected a corpus of roughly 250 pivotal references, prioritizing the most recent ones (preferably post-2023). We applied the following two rules: • Journal/Conference Impact: We consider mainly Q1 journal papers (via SCImago/JCR) and CORE A/A* conferences (e.g., SC, ISCA, MICRO, ASPLOS, EuroSys), the ranking being considered at the publication date. • Empirical Validation Rule: Regarding works on theoretical energy models or optimization frameworks, we have considered those that provide empirical evaluation on real devices or validated simulators.

2.2. Integration of High-Impact Grey Literature In AI and large-scale HPC, the state-of-the-art is usually established by practitioners before being considered (in a more formal way ) in academic journals. Following this observation, we selected a set of non-academic literature:

2. Selection and Methodology

• Industrial Reports: Technical documentation, architectural whitepapers, and carbon footprint reports released by leading vendors (e.g., NVIDIA’s Blackwell specifications [4], Google’s TPU architectures [11], and Meta’s open-source LLM reports [3]).

To ensure a rigorous and reproducible overview of the state of the art, we adopt a multi-stage hybrid Systematic Literature Review (SLR) methodology. Given the rapid evolution of AI hardware, relying solely on data from classical databases might lead to outdated configurations. Thus, we

• Institutional Frameworks: Macro-environmental data and reports from governmental institutions, including data center forecasts of the International Energy Agency (IEA) [1] and objectives of the Paris Agreement [6].

R.N. Tchakoute and C. Tadonki: Preprint submitted to Elsevier

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Energy-Aware Computing in 2026

Figure 2: The landscape of energy-aware computing in the Cloud-Edge-HPC continuum.

2.3. Overview of the Major Selected Contributions We made a specific methodological choice regarding the selection of the papers for our corpus as previously described. We acknowledge that this choice may have resulted in the omission of genuine/valuable/valued contributions (less recent ones, books, blogs, conferences/journals with unmatched rank, open archives). The reader should be aware of this deliberate choice that we made. However, we think that it is highly likely that most of the aforementioned papers are cited in those selected for this survey.

Cloud Computing (46), Green Computing (41), Power Demand (27), Energy-Aware Scheduling (26), Data Centers (26), and Power Management (25). Figure 3 provides a visual summary of the keywords according to their magnitude.

2.4. Keyword-based Analysis of our corpus To identify the dominant research themes within the studied corpus, we analyzed the keywords provided by the authors. After processing and normalizing the extracted keywords, we obtained 2,133 terms with redundancies and 949 unique terms (45%). We also considered the case of semantic equivalence. This aggregation revealed that Energy Efficiency was the most prominent topic (99 occurrences), followed by Energy Consumption (77), Sustainability (67), and Carbon Footprint (61). Other recurrent themes included R.N. Tchakoute and C. Tadonki: Preprint submitted to Elsevier

Figure 3: Panorama of the keywords from our corpus.

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Energy-Aware Computing in 2026 Topic

References

Profiling methodology Profiling tools Monitoring tools Hardware design

[12];[13];[14], [15], [16], [17]

Green software/OS & Code Power/perf predictive modeling

Job scheduling & VM placement

Others optimization approaches

Cooling Technologies Special case of AI

[15], [18], [19], [20], [21] [22], [23], [24] [25], [26], [27], [28], [29], [30], [31], [32], [33], [34], [35], [36], [37], [38], [39], [40], [41], [42], [43], [44], [45], [46], [47] [48], [49], [50], [51], [52], [53], [54], [55], [56], [57], [10], [58], [59], [60], [61], [62], [63], [64], [65], [66], [67], [68], [69], [70] [71], [24], [72], [73], [74], [75], [16], [76], [77], [78], [79], [80], [81], [82], [83], [34], [75], [74], [35], [36], [84], [85], [86], [87], [88], [89] [90], [91], [92], [78], [93], [94], [95], [96], [97], [98], [99], [100], [101], [102], [103], [104], [105], [106], [107], [108], [109], [110], [111], [112], [113], [114], [115], [116], [117], [118], [119], [120], [121], [122], [123], [124], [125], [126], [127], for AI ([128], [129], [130]) [131], [132], [133], [134], [135], [136], [137], [138], [139], [140], [141], [142], [143], [144], [145], [146], [147], [148], [149] [76], [40], [150], [134], [151], [152], [85], [107], [153], [154] [155] [156], [157], [15], [30], [50], [51], [31], [158], [159], [160], [9], [161], [162], [163], [164], [165], [166], [167], [168], [84], [169], [161], [170], [171], [172], [173], [87], [51], [42], [174], [46]

Table 1 Overview of Recent Energy-Aware Computing Studies

3. Main Energy-Related Metrics To optimize energy across the Cloud-Edge continuum, researchers rely on fine-grain metrics besides the classical electrical power (Watts) to encompass thermal dissipation, water consumption, and carbon emissions (over the whole life cycle). This extended focus implies adapting traditional HPC benchmarking so as to consider large-scale applications like those from Generative AI and large-scale infrastructures like Exascale machines.

3.1. Key Metrics for Large-Scale Infrastructures In extreme-scale computing, facility-level power consumption is the main critical ceiling. The November 2025 TOP500 list illustrates this unprecedented energy budget: El Capitan system achieves 1.809 ExaFlops drawing 29.68 Megawatts (MW) [2], while JUPITER Booster (the first European Exascale system) achieves 1.000 ExaFlops at a noteworthy 63 GFlops/Watt. Table 2 provides sample data related to processing performance and energy cost, which R.N. Tchakoute and C. Tadonki: Preprint submitted to Elsevier

Table 2 Estimated Hourly Electricity Cost of Exascale Supercomputers (Based on Top500 Data - Nov. 2025) Machine EL CAPITAN FRONTIER AURORA JUPITER

Host Region USA (California) USA (Tennessee) USA (Illinois) Germany (Jülich)

Sustained Perf. 1.809 EFLOPS 1.353 EFLOPS 1.012 EFLOPS 1.000 EFLOPS

Power (MW) 29.68 MW 22.78 MW 38.69 MW 15.87 MW

$ / kwh 0.148 0.148 0.148 0.285

Cost / Hour $4,392 $3,371 $5,726 $4,522

illustrate the significant operational expenditure (OpEx) that justifies the need for energy efficiency [175, 176]. The total hourly cost is calculated using the average price per kWh within [2023;2026] [177]. Thermal Design Power (TDP), which now routinely exceeds 1000W for AI chips such as the NVIDIA B200 [4], governs the magnitude of cooling requirements. At the individual facility level, Power Usage Effectiveness (PUE) remains the standard [178], but is no longer sufficient from the isolation point of view. The shift toward extreme-density AI clusters requires a huge amount of chilled water, which promotes Water Usage Effectiveness (WUE) to the rank of a critical metric. In water-scarce regions, minimizing the volume of water evaporated per kilowatt-hour (L/kWh) is currently prioritized even above PUE [179]. Furthermore, optimizing modern data centers requires auditing their direct supply architecture; Power Supply Efficiency (PS-Loss) captures the resistance conversion of Uninterruptible Power Supplies (UPS) [142], where active load-balancing can reduce lifecycle expenditures independently of IT scheduling [143, 98].

3.2. AI-Related Energy-Carbon Data The traditional FLOPS metric is no longer the only focus when it comes to large-scale AI workloads. The complexity analysis of GenAI considers specific metrics such as Energy per Token (Joules/Token) for inference, and Training Throughput Efficiency (Tokens/Second/Watt) for training. Hybrid benchmarks such as Carbon-Aware Accuracy (Carburacy) evaluate hyperparameter sweeps simultaneously across cognitive effectiveness (F1/BLEU) and eco-sustainability curves, identifying models that achieve competitive accuracy at the lowest 𝐶𝑂2 cost [171]. Mostly focusing on raw power consumption obscures the environmental impact, which is quantified through the operational Carbon Footprint represented by the Carbon Intensity (𝑘𝑔 𝐶𝑂2 𝑒∕𝑘𝑊 ℎ). Table 3 provides the hourly footprints of the latest Exascale architectures based on regional grid intensities [180]. This dichotomy creates distinct contextual optimization scenarios: Cap-Ex Power Limits (maximizing FLOPS/W under strict utility caps), Renewable-Abundance (focusing purely on time-to-solution when powered by 100% renewables, this is the case of the LUMI system), and GridAware Migration (report or migration of cloud-based AI training for sustainability consideration).

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Energy-Aware Computing in 2026 Table 3 Estimated Hourly 𝐶𝑂2 Footprint of Leading Supercomputers Machine Power Grid Power (MW) 𝑘𝑔(𝐶𝑂2 𝑒) / kWh Total 𝑘𝑔(𝐶𝑂2 𝑒) / Hr EL CAPITAN (USA) Mixed Renewable 29.68 MW 0.220 ∼ 6, 529 FRONTIER (USA) Regional Average 22.78 MW 0.360 ∼ 8, 200 AURORA (USA) High Fossil 38.69 MW 0.320 ∼ 12, 380 JUPITER (DE) Mixed European 15.87 MW 0.380 ∼ 6, 030 LUMI (FI)* 100% Hydro/Nuclear 7.10 MW 0.050* ∼ 355 *LUMI operates on nearly 100% renewable energy; its lowest carbon footprint illustrates the impact of the carbon factor.

4. Architectures and Energy Trade-offs The end of Dennard scaling has led to the emergence of highly specialized architectures within the hardware landscape. Performance is no longer bounded by transistor density, but rather by power delivery and heat dissipation. An energy-aware computing investigation requires examining processors across the continuum: from battery-powered embedded systems to power-hungry (megawatt-scale) processors [181].

4.1. The Edge and IoT: Milliwatt-Scale Inference Within the edge ecosystem (remote sensors, drones, robotics), devices strictly target space, wattage, and performance (SWaP) envelopes. Ultra-low-power microcontrollers (MCUs) natively utilize ratio-based energy pre-assignment to distribute micro-joules proportionally to the priority level of the tasks. In energy-aware systems, schedulers dynamically adapt to intermittent RF/solar availability. By embedding ultra-lightweight adaptive checkpoints into NonVolatile RAM (NVRAM) a few milliseconds before voltage failure, Edge devices process Deep Neural Networks via transient energy recovery without having to restart [182]. In order to maximize inference-per-watt, edge platforms leverage Coarse-Grained Reconfigurable Architectures (CGRAs) and approximate computing. By modeling hardware error as an acceptable "additive noise", compilers schedule the execution of some blocks in a non-deterministic way on specialized co-processors, thus sacrificing numerical precision constraints in favor of energy reduction [33, 36]. As edge computing is subject to an increasing demand (e.g., Raspberry Pi 5 has a power peak of 15W), SingleBoard Computers tend to rely on Heterogeneous Multicore Processors (big.LITTLE architectures). In this context, non-stationary workloads require predictive learning-based orchestration [75] and decentralized power-management, thus allowing local components to autonomously regulate operating states [41, 43, 45]. A specific case of extreme-edge computing is that of Low Earth Orbit (LEO) satellites, which suffer from high operational thermal throttling. To bypass the limited solar energy budget, LEO architectures employ Layer-Wise CoInference Scheduling, splitting the neural network layers across satellite radio links and offloading tensor computations on Earth-bound servers [183, 129]. Furthermore, processing software updates on these decentralized sensors requires microservice containerization, yet traditional abstractions like Docker are well-known for being detrimental w.r.t power-constrained silicon. Compiling frameworks that directly target bare-metal devices (e.g., ONNX) R.N. Tchakoute and C. Tadonki: Preprint submitted to Elsevier

or that use low-memory WebAssembly (WASM) yields significantly efficient on-device inference [184]. Finally, as Edge AI pushes Multi-Processor System-on-Chips (MPSoCs) to their thermal limits, internal Network-on-Chip (NoC) wiring becomes a primary energy drain. State-ofthe-art NoC schedulers (e.g., IntelliNoC) deploy continuous Q-learning agents natively on silicon to apply fine-grained DVFS, thus autonomously shutting down hardware routing components to prevent localized overheating [96, 185, 26, 135].

4.2. Cloud Infrastructures and Network Overheads At the data center level, the energy battle pits traditional x86 architectures against ARM-based hyperscaler chips. To cope with the highly increasing power penalty of highclock frequencies, x86 architectures (e.g., Intel Xeon 6 Sierra Forest, AMD EPYC Turin) follow the path of heterogeneous design, deploying up to 288 Efficiency Cores (E-cores) per socket [186, 187]. Although highly efficient at the core level, these dense sockets carry 500W TDPs, thus testing the air cooling system. In contrast, driven by the RIKEN Fugaku supercomputer, cloud providers increasingly deploy custom ARM RISC silicon (AWS Graviton4, NVIDIA Grace). By eliminating legacy decode overheads and integrating LPDDR5X memory, ARM architectures maximize predictable performance-per-Watt [188]. Beyond the basic processors, the internal infrastructure of the Cloud represents a considerable energy vector. Current workflows tend to generate massive "Coflows." To reduce DCN power waste, server-centric networks and Software-Defined Networking (SDN) controllers dynamically map traffic dependencies, intentionally collapsing idle optical paths and packet-switching routing tables so as to minimize the networking footprint by up to 40% without detrimental packet losses [79].

4.3. AI Super-Accelerators and Exascale Horizons LLM training is driving a noteworthy shift in hardware design. While GPUs in data centers show an operational TDP of 300W, modern reticle-limit devices (e.g., NVIDIA Blackwell B200, AMD MI300X) draw from 1000W to 1200W [4]. Evaluating raw TDP hides a vulnerability induced by Transformers: Voltage Emergencies (𝑑𝑖∕𝑑𝑡). The highly synchronous, bursty execution of Attention layers currently creates unprecedented microsecond spikes, thus destabilizing power delivery networks and forcing a conservative static guard-band throttling that degrades the overall energy-to-solution margin. Domain-specific accelerators (e.g., Google TPUs) address this through fine-grained gating, selectively powering down inactive functional units cycle-by-cycle [189, 11]. Novel accelerator architecture such as GCNAX, which tailors the compute engine, buffer structure, and size based on specific Graph convolutional neural networks (GCNs) dataflow, was proposed [47]. Advances in interconnects (e.g., NVLink) optimize massive die-to-die tensor communication [29, 30, 190], while granular voltage scaling at the Page 5 of 26

Energy-Aware Computing in 2026 Table 4 Current Leading AI Accelerators (Training & Inference Engines - 2025/2026) Accelerator NVIDIA B300 (Ultra)

TDP (W) 1400 W

Peak Precision FP4, FP6, INT8

Memory 288GB HBM3e

AMD MI400X

1600 W

FP4, FP8, FP16

432GB HBM4

Google TPU v7

157 W

BF16, FP8, INT8

192GB HBM3e

Intel Gaudi 3

900 W

BF16, FP8

128GB HBM2e

Noteworthy Energy Features Dynamic tensor scaling; standardizes liquid cooling Advanced multi-die packaging isolates logic from I/O Systolic arrays minimize logic decode footprint Integrated RoCE networking eliminates NIC overhead

level of individual computational operators allows precise adaptation to workload characteristics [86, 191]. Looking toward 2026 and post-Exascale deployments, systems like Alice Recoque (AMD MI430X/SiPearl Rhea2 - France) and Discovery (ORNL - USA) rely on data-driven operational analytics to strictly enforce facility energy budgets [192, 193]. To power these cloud systems, accelerators have evolved towards "Rack-Scale" paradigms (e.g., the 120 kW NVIDIA GB300 NVL72). Hardware selection requires dealing with a compromise between energy efficiency, precision (FP4 natively drastically reduces energy waste), and software lock-in (ASICs provide superior FLOPS/W but restrict developers to specific compiler stacks).

4.4. Quantitative Overview of Hardware Trends

% of Surveyed Papers

A statistical analysis of recent literature in computer hardware (𝑁 = 43 selected papers) reveals a decisive shift away from traditional CPU. Approximately 42% of recent research works are dedicated to AI Super-Accelerators (e.g., GPUs, TPUs, Processing-in-Memory, and Wafer-Scale architectures), thus reflecting the industrial response to thermal concerns when processing large-scale workloads like those related to LLMs. The Edge and IoT continuum accounts for 33% of the literature, with a major emphasis on Sub-Watt NPUs and Battery-Free RF-harvesting chips. General-purpose cloud CPUs, Chiplets (UCIe), and network interconnects cover the remaining 25%. This distribution empirically confirms that the end of Dennard Scaling pushed toward prioritizing extreme-edge and extreme-accelerator heterogeneity over general-purpose silicon.

42 40

33 25

20 0 Accelerators

Edge & IoT CPUs & Networks

Figure 4: Distribution of recent hardware-related energy-aware studies across the computing continuum.

R.N. Tchakoute and C. Tadonki: Preprint submitted to Elsevier

5. Energy and Carbon Profiling Tools Dynamic energy optimization strategies across the CloudEdge-HPC continuum require real-time, fine-grained telemetry. As hardware diversity expands, the abstraction gap between software workflow and hardware profile is widening. The profiling ecosystem can be categorized into three paradigms: silicon-level middleware, institutional facility monitoring, and cloud-level carbon estimators.

5.1. Silicon Sensors and Abstraction Middleware Modern processors incorporate native power sensors to manage power-related aspects. On bleeding-edge 3nm FinFET nodes, On-Die Power Sensors (ODPS) use machine learning calibration to basically limit sub-50𝜇s over-current excursions before passing abstractions to the OS [194]. To make these raw registers available to developers, middleware tools consider unified interfaces for machine-specific MSRs. Furthermore, execution frameworks that take parallelization into account (e.g., PARMA) model the hidden parallelism of dynamic workloads on the fly, thus adjusting core voltage domains to improve Energy-Delay-Product (EDP) by nearly 50% without invasive code instrumentation [73]. Hardware-Accelerator Telemetry: The NVIDIA Management Library (NVML) is a low-level API that provides instantaneous access to power-related values and programmatic power capping. However, recent profiling work reveals critical flaws: tools like nvidia-smi sample only ∼25% of actual runtime on heavily burdened A100/H100 GPUs, systematically underestimating total job energy due to clock frequency aliasing [13]. CPU Telemetry (RAPL): Intel’s RAPL and AMD’s APM stand as the reference of in-band profiling [195]. Beyond structural omissions, generic hardware limiters are "application-blind". When a mixed-tenancy node reaches an artificial power cap, RAPL indiscriminately throttles the fastest-running cores, thus aggressively stifling latencycritical high-priority applications as well as demanding software-controlled "Per-Application Power Shares" [196, 197]. Unified Middleware: LLNL’s Variorum [198] provides a vendor-agnostic C-API to dynamically cap power consumption across heterogeneous nodes. Similarly, the ALUMET energy-measurement framework [12, 199] provides an extensible, asynchronous Rust-based pipeline designed to minimize the intrusive overhead of high-frequency RAPL polling. Built upon LIKWID [20], the EE-HPC energy-related framework [23] provides hybrid HPC centers with job-specific monitoring, pairing phase detection with MPI/ OpenMP tuning. Data-Dependent Power Fluctuations: Macroscopic static modeling tends to be chronically inaccurate due to a strong dependency on static inputs. Benchmarking proves that feeding functionally dissimilar vectors (e.g., vision inputs vs. sparse tensors) diverts the GPU instruction branching, thus generating wild internal silicon footprints even when raw FLOPS remain identical [200, 201]. Similarly, comparative database profiling (MongoDB vs. PostgreSQL) Page 6 of 26

Energy-Aware Computing in 2026

5.2. Institutional-level Facility Monitoring To avoid software overloads, national power grid initiatives use out-of-band physical architectures. Platforms like D.A.V.I.D.E. integrate hardware sensors directly into compute backplanes for high-frequency telemetry without context-switching overheads [40]. Facility monitoring is mostly based on the Prometheus/Grafana stack and TimeSeries Databases (TSDBs). Deployment examples include CEEMS (Jean Zay supercomputer), which scrapes metrics at 10-second intervals so as to cross-reference jobs with the French carbon factors [22]; and Grid’5000 (Kwollect), which synchronizes out-of-band wattmeters with in-band RAPL data. High Definition Energy Efficiency Monitoring (HDEEM) uses FPGA probes and resistive PCIe shunts to capture transient micro-spikes that cannot be caught up by RAPL [14]. However, running 100,000 GPUs generates terabytes of TSDB metrics daily, thus creating a "Big Data" I/O bottleneck.

5.3. Virtualization Wall and Carbon Estimation Public cloud providers restrict access to hardware telemetry because of side-channel threats. Power-consumption alerts can be exploited to infer sensitive system behavior [32, 204]. The GateBleed attack exposed the fact that hardware power-gating recovery delays allow malicious intruders to reconstruct hidden Transformer routing paths and proprietary datasets, thus proving that telemetry breaks privacy [39]. R.N. Tchakoute and C. Tadonki: Preprint submitted to Elsevier

In such a constrained context, direct measurement is replaced by analytical estimation via Performance Monitoring Counters (PMCs) [89]. Lightweight Python libraries (e.g, CodeCarbon, Eco2AI) fall back to analytical estimation when hardware registers are unavailable. Recent methodologies utilize LLMs to predict power variations and drive HPC scheduling directly [78]. To handle operational uncertainty of the electrical grid, frameworks like U-DUCT introduce information-gap theory to sweep server uncertainty bounds without assuming precise power distributions [105]. For the sake of consistency, container-aware protocols like Phoeni6 ensure transparent and reproducible neural network benchmarking across different clusters [17, 205]. Going beyond passive measurement, Zeus [206] dynamically navigates the Pareto frontier between DNN training time and energy, thus actively adjusting GPU batch sizes at runtime.

5.4. Trends on Measurement & Profiling The evaluation of profiling methodologies across our corpus of 33 articles reveals the considerable impact of the "virtualization wall". While previous research studies heavily prioritized physical out-of-band monitoring, only 21% of post-2023 papers focus on hardware shunts or TSDB facility monitors. In addition, 45% of the literature now strictly evaluates Software-Level Carbon Estimators and Machine Learning predictive telemetry (e.g., LLM-based power prediction and CodeCarbon). In-band silicon sensors and abstraction middleware (e.g., RAPL, eBPF, ALUMET) belong to the remaining 34%. This proves a pivotal softwareengineering observation: because cloud hyperscalers prohibit hardware telemetry for security, researchers are increasingly pushed towards purely virtual and predictive carbon estimation. % of Surveyed Papers

illustrates that identical operational schemes can exhibit severe energy divergence based on the underlying query logic [202]. The Observer Effect: The middleware query relies on the execution of monitoring threads by the CPU. Querying MSRs above 100 Hz interrupts the application threads, pollutes the memory caches, and consumes some power, thus affecting the workload’s efficiency. To cope with this, state-of-the-art predictive techniques leverage NLP-adapted Deep Learning approaches. Frameworks like DeepPM autovectorize compiler-generated binaries into Transformer models in order to forecast power consumption, thus bypassing hardware execution [72]. Similarly, EffiCast utilizes sequence-based LSTM/Transformers to resolve dynamic L3-cache contention and project microsecond-latency V/f scaling without static inputs [82]. Standardized ML Telemetry & Edge AI: To deeply figure out measurement inconsistencies, the MLPerf Power methodology has been standardized [203]. This was provided through documenting over 1,800 reproducible profiles across 60 systems [160]. The CARAML suite similarly unifies assessments across different Exascale architectures [162, 174]. Scaling estimation to multi-node domains introduces some profiling bottlenecks; Exascale systems now deploy Real-Time AI-Powered Monitoring via neural classification models on peripheral nodes to extrapolate and forecast power deviations, thus preventing thermal faults autonomously [24, 21, 87].

60 45 40

34 21

20 0 Estimators

Silicon & eBPF Out-of-Band

Figure 5: Overview of energy measurement methodologies.

6. Software-Level Energy Optimization While high-performance chips define minimum energy consumption, a system’s carbon footprint is largely determined by its software. Thus, this carbon footprint can only be mitigated through advanced and comprehensive software optimization: from code compilation to operating system power management, including distributed coarse-grain scheduling.

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Energy-Aware Computing in 2026

6.1. Algorithmic and Code-Level Optimizations

conclude that there is a frequent failure to optimize transient memory thresholds, thus producing solutions that draw significantly higher power consumption than manual refactoring [49, 55]. UI/UX and Thread Governance: The Software Engineering community agrees on the significant power burden of executing heavy interfaces at the system-level; "PersonaBased UI/UX" avoids continuous screen-refresh operations in order to respect the power limits of the device [67, 108, 68]. On MPSoCs with heterogeneous edges, interfaces like HARP distribute asynchronous threads following a specific scheduling algorithm [210]. Energy optimization on large-scale computing clusters requires platform-specific co-tuning; JiT (Just in Time) compiled frameworks such as JAX have been shown to exhibit deep operational instability when forced to the lowest dynamic frequencies, which does not appear to be the case with TensorFlow [211].

Modern design mandates "energy clarity", thus promoting formal energy interfaces that provide maximum power consumption estimates before the integrated circuit is put into operation [207]. Advanced software engineering incorporates model-driven engineering (e.g., RADIANCE+) to prototype abstract algorithmic configurations and extract power consumption estimates before compilation [69, 108]. Data-Oriented ETL and DataFrames: Preprocessing represents a significant and continuous source of energy consumption. Evaluation of data management frameworks such as Pandas, Vaex, and Dask reveals that multithreaded memory access graphs (Dask) optimize parallelizable filtering, while lazy evaluation processors (Vaex) minimize active RAM consumption during transpositions. In distributed NoSQL ledgers (e.g., Cassandra), adjusting "Consistency Levels" fundamentally acts as a physical power multiplier, mitigating redundant network transmissions [208]. Bottomup profiling successfully parameterizes complex relational joins across distributed databases to predict computationally heavy query pathways [202]. Tiling and Precision Scaling: Source-code loop transformations such as tiling and fusion aim to reduce cache misses and redundant memory accesses. Energy-Aware tiling structurally forces auto-tuning compilers to prioritize power grids that constrain GPU register-leakage rather than raw execution latency [147]. Precision scaling (FP32 to INT8/FP4) decreases memory bandwidth requirements and ALU power activation. Frameworks and JVMs: Empirical studies show different DL frameworks exhibit measurable efficiency discrepancy [50, 51, 209]. At runtime, models compiled with TensorFlow frequently exhibit lower memory-related costs than those obtained with PyTorch, while JVM configurations aggressively shift static consumption from the host [53, 18]. Message Passing Power-Overhead: MPI processes consume dynamic power during wait times related to communication operations. The (COUNTDOWN) tool switches active CPUs into ultra-low ACPI states during these wait times, thus recovering up to 37% of power at the node level [52]. Furthermore, Green Linear Algebra (GreenLA) restructures the core semantic of the BLAS to minimize VRAM accesses, thus reducing power consumption by 13 [60]. Automatic kernel optimization through auto-tuning identifies optimal frequency and memory constraints before execution [83]. The lack of parallelization of the processor’s data loaders could lead to underloading of the energy-intensive active accelerators, thus increasing the number of joules per epoch. Energy Leaks in AI-Based Systems: The analysis of code repositories reveals pervasive power leaks (suboptimal API configurations). The lack of (efficient) parallelization of the processor’s data loaders could lead to underloaded power-hungry (1000MW) accelerators, thus increasing Joules-per-epoch. [64, 66]. Furthermore, evaluations of LLM-assisted coding (with GitHub Copilot, for instance)

At runtime, the operating system manages electrical physics in real-time using three main mechanisms: Dynamic Power Capping, Workload Consolidation, and CarbonAware Scheduling. DVFS and Q-Learning: Dynamic Voltage and Frequency Scaling (DVFS) exploits the available computational headroom. Advanced schedulers handle dynamic frequency management following the model of the NP-hard variablesize bin packing puzzle [94]. At runtime, MPI "ApplicationOblivious" trigger DVFS step-downs automatically [80]. In edge environments running on Linux, Deep Reinforcement Learning (DRL) adaptively orchestrates DVFS states across asynchronous workloads [48]. Q-Learning schedulers continuously build state-action matrices to track the arrival of tasks based on power availability, thus avoiding blockages related to greedy heuristics [116, 106]. Phase-Aware Core/Uncore Scaling: Modern architectures allocate substantial power to "uncore" components (caches, interconnects). Phase-aware approaches explicitly coordinate core/uncore adjustments [213, 57, 145].

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6.2. Energy-Aware Compilation Traditional compilers (e.g., GCC, LLVM) target performance, but minimizing execution time does not linearly translate into energy minimization [147]. Energy-efficient compilers use instruction scheduling to minimize the Hamming distance between operands (their values), thereby reducing transistor switching. The MLIR framework optimizes tensor graphs based on the thermal profiles of the hardware, by inserting power preventive cut-off instructions. Datasets like Greenlight allow profiling the hardware footprint of TensorFlow API calls, thus noticing unpredictable energy spikes [21]. For a unify consoderation of extreme heterogeneity, SYCL C++ toolchains (e.g., SYnergy) incorporate explicit power limits at compile time, assigning finegrained core/memory scaling limits on a per-kernel basis [138, 51, 212].

6.3. Dynamic Power Management

Energy-Aware Computing in 2026

Job-Level Power Allocation (SLURM/PBS): Facility operators enforce strict power limits [214]. Adaptive strategies combine power capping and runtime profiling [131]. In congested environments, coordinated control mitigates transient peaks [215]. Middleware such as BAR/BARMAN intercepts OpenMP tasks to dynamically redistribute unused micro-power among coexisting applications [216]. Imposing strict limits on dense nodes causes cascades of flow limitation. Multi-CPU/GPU Reinforcement Power-Capping: Imposing strict limits on dense nodes causes a series of limitations. RL frameworks such as PowerCoord actively reallocate power budgets between host CPUs and PCIe accelerators based on phase-prediction [217]. Recent benchmark evaluations of the FRONTIER supercomputer demonstrate that Frequency Capping systematically outperforms raw power-capping on memory-bound applications [218, 148].

6.4. Cloud/Edge Workload Management Since static power leakage pushes hyperscalers to follow a dense stacking strategy for the management of containers, an accurate mathematical calculation of the multi-objective (performance and energy) mapping requires computationally expensive back-end heuristics such as hyperheuristics for Cloud Scheduling Problems (HHCSP) [100]. Virtualization and Learning-Based Orchestration: Energy-efficient cloud operation relies on dynamic workload consolidation [77, 219, 220]. Federated learning techniques enable coordinated scheduling across geo-distributed infrastructures [97, 221]. To address latency and energy overheads [158], DRL optimizes migration decisions [141, 123], with renewable energy-aware geo-distributed job assignment [99]. Microarchitectural innovations enable deeper low-power states with reduced wake-up latency [222, 223]. Orchestrators that use Flower Pollination Optimization have demonstrably reduced carbon emissions by up to 48.60% during Virtual Machine Placements (VMP) [121, 88]. Green Bin Packing & Quality-Aware Consolidation: The online bin packing approach treats volatile VMs through Green Bin Packing heuristics [224]. EcoCore and AgilePkgC intricately co-adjust CPU voltages under the awareness of tail-latency [223, 225]. Topology-Aware approaches seamlessly estimate CPU thermal limits and network switch hopdistances [125, 111, 126]. To solve the NP-hard bin packing problem, hypervisors use evolutionary algorithms that mathematically combine QoS constraints and power consumption limits [124, 226]. Dynamic Cloud/Edge Heuristics: Modern schedulers run complex heuristics such as modified artificial bee colony algorithms, binary search [227], differential evolution [119], and genetic algorithms [114, 228]. Container-based methodologies enforce hypervisor live-migrations to strictly match dynamic network limits [139]. The task scheduling community relies heavily on Particle Swarm Optimization (PSO)

R.N. Tchakoute and C. Tadonki: Preprint submitted to Elsevier

[120, 122]. PSO-based multi-objective frameworks explicitly maintain swarm diversity through discrete/quantum variants [127]. By continuously adjusting particle speed, orchestrators quickly resolve VMP matrices (in real-time), performing hot migrations to optimize host storage while preventing SLA violations. Hybrid intelligent swarms (e.g., Cost-Energy Aware Spider Monkey Optimization) perform an exact routing of payloads to facilities experiencing maximum localized underutilization [149]. Accelerators Consolidation & Serverless Cold-Starts: Dynamic thread block migration redistributes workloads across GPUs [61]. Spatial partitioning (MIG slicing) enables multi-tenant execution, but at the cost of noticeable power and thermal interference across logically isolated workloads [229, 230]. Serverless computing, considering Function as a service (FaaS), introduces significant cold-start overheads [231]. Asymmetric multicore architectures assign latencycritical tasks to P-cores and keep-alive mechanisms to Ecores [232]. Antagonism Between SLAs and Sustainability: Flow network algorithms ensure SLA compliance alongside efficient energy management [90, 233]. Cuckoo Search algorithms maximize resource packing, thus preventing violations during DVFS throttling [163]. However, several analyses confirm a deep uncorrelation: almost all ML engineers fail to implement green metrics into production code due to a lack of standardized guidelines [63]. Carbon-Aware Scheduling: Optimizing for carbon requires considering spatio-temporal variability [91]. Temporal shifting postpones flexible workloads to low-carbon periods [101], while spatial routing directs computation where the availability of renewable energy is higher [140, 234]. Multi-agent RL techniques incorporate dynamic signals to optimize trade-offs [98, 156, 110]. Simulation platforms validate scalable abstractions [54], while edge devices dynamically offload workloads based on carbon network conditions [144]. Deliberately pausing/resuming scientific processing based on the network’s marginal carbon intensity (MCI) reduces the carbon footprint by more than 80% [235]. However, optimization exclusively based on MCI has flaws; indeed, missing the evaluation of absolute emission curves leads data centers to unexpected congestion [236]. Hypervisors such as Ecovisor and GreenFlow transmit physical carbon data directly via the API, ensuring that AI containers self-regulate [237, 164, 128]. Hypervisor Benchmarking and Cloud Service Brokerage (CSB): The design of the basic hypervisor (KVM vs. Xen) is inherently subject to power consumption fluctuations [238]. Empirical studies explicitly show the sharp decrease in yields associated with carbon-aware load shifting; frequent temporal shifting leads to tasks generating a significant carbon penalty from the use of intermediate network equipment [239]. For the purpose of standardization, CSBs deploy mathematical pricing frameworks to incentivize tenants to minimize computing peaks [240].

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Energy-Aware Computing in 2026

6.5. Time-to-Solution vs. Energy-to-Solution Modern scheduling techniques mainly seek efficiency. Optimizing for energy leads to instant execution of workloads in order to achieve maximum performance efficiency. Conversely, optimizing for carbon leads to delaying workloads following the availability of sustainable grids [146]. Race-to-Halt Paradigm: If a task is CPU-bound, the most energy-efficient strategy is to run at maximum clock frequency so as to finish it quickly and switch to a sleep mode. Stochastic queuing-network frameworks mathematically model cloud VM arrival rates, thereby consistently proving that Race-to-Halt minimizes footprints [81]. The Software Configurable Paradox: Reliable investigations show that optimizing the configuration matrix for the absolute fastest binary runtime frequently spikes maximum baseline voltage states, thus generating highly asymmetric electricity consumption overheads [242]. Time vs. Energy: The basic time/energy correlation seems to be broken during memory-bound workloads, where boosting the CPU frequency has no effect on time reduction, but increases power consumption. Linear Programming algorithms bound the Pareto front for heterogeneous tasks, empowering precise trade-offs [95, 92]. When it comes to managing time/energy trade-offs between independent workloads, energy-efficient schedulers route algorithmic queues to cores experiencing minimal physical thermal stress [118]. Distributed Scaling Imbalance (Straggler Effect): The workload imbalance causes the fastest processors to go into standby mode at the synchronization barriers (i.e. power wastage) [170]. Coordinated control strategies (selective frequency boost or controlled downscaling) align execution phases. Reliability-Performance Degradation Loop: Aggressive DVFS increases the vulnerability to soft errors. Stateof-the-art dispatchers seek a balance between execution time, power, and reliability [104, 112, 113]. Due to task dependencies and increased execution time, an energy-efficient scheduling of precedence-constrained applications within the context of SLAs on DVFS-enable clusters has been proposed by Hu et al. [115]. Failure-Aware VM Consolidation and Asynchronous checkpoints leverage exponential smoothing to predict impending hazards, thereby lowering overall operational energy by 34% without jeopardizing task recovery [71, 243, 244].

R.N. Tchakoute and C. Tadonki: Preprint submitted to Elsevier

Following what has been said, energy optimization requires explicitly weighing the cost of static leakage against the exponential penalty of dynamic frequency scaling.

6.6. Trends on Software Optimization An analysis of the selected papers within the literature on software optimization (𝑁 = 52 papers) reveals a sharp systemic shift toward distributed orchestration. Nearly 46% of the contributions focus on virtual machine consolidation and carbon-aware scheduling, mostly by leveraging metaheuristics like Particle Swarm Optimization (PSO) and Deep Reinforcement Learning (DRL). Dynamic Power Management (DVFS) and node-level Power Capping cover 31% of the corpus, while pure algorithmic and code-level optimizations (e.g., compiler loops, dataframes, "Energy Smells") account for 23%. This uneven distribution illustrates the fact that, while code efficiency remains fundamental, modern academic consensus favors mitigating static leaks from macro-infrastructures through intelligent cloud orchestrators. % of Surveyed Papers

Carbon-Aware DevOps: Carbon-aware computing extends to continuous integration (CI) & continuous delivery/deployment (CD) pipelines and GitOps frameworks [70]. By combining execution tracing and energy consumption monitoring, CI/CD systems directly associate variations in energy consumption with specific code changes, thus structurally preventing the deployment of suboptimal code in a production environment [61, 15, 65]. Industrial case studies on developers’ awareness of green software design and strategies to promote it within the company are a way to encourage green software design [241].

60 46 40

31 23

20 0 Consolidation

DVFS & Cap. Code & Compilers

Figure 6: Prevalence of software-level energy optimization strategies within recent literature.

7. The Energy Wall of Generative AI The impressive emergence of Generative Artificial Intelligence (GenAI) has significantly magnified the level of resources needed in data centers. Since 2012, the computing resources needed to train advanced AI systems is doubling approximately every 3.4 months [245]. As of early 2026, due to the transition toward trillion-parameter models together with the pervasive deployment of autonomous agentic workflows, the energy consumption of large-scale AI has moved from an operational challenge to a macro-environmental crisis. While researchers insist on foundational manifestos that chart the course towards "green AI", the rapid growth of needed capabilities requires an immediate architectural revolution that affects IT budgets, data storage and global community incentive structures to ensure the sustainability of the AI ecosystem [246]. To analyze this landscape, the AI energy footprint must be strictly divided into two categories using a formalized terminology: Red AI versus Green AI. The term "red AI" refers to any pipeline whose structure requires the use of very large computing resources for the sole purpose of improving performance accuracy by a tiny percentage, thus Page 10 of 26

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prioritizing performance over thermodynamic consequences [167]. Conversely, "green AI" systematically imposes efficiency requirements alongside accuracy criteria. To structure this quest for sustainability, the software engineering community has listed robust "green architectural tactics". However, empirical analysis of reference frameworks warns of extreme friction during commercial adaptation; Assessments of more than 160 active open-source ML ecosystems consistently reveal a significant gap between the existence of these ecological tactical protocols and the willingness of AI engineers to integrate them beyond basic performance metrics [247, 56].

7.1. The Global Carbon Cost of Models Training Training a dense state-of-the-art Large Language Model (LLM) requires processing tens of trillions of tokens across highly synchronized GPU clusters. A 100,000-GPU cluster consumes more than 100 to 150 Megawatts (MW). Training these dense models structurally requires fragmenting the model state across multiple devices using Pipeline Parallelism (PP) and Tensor Parallelism (TP) (e.g., via MegatronLM). Recent assessments have proven that arbitrary sizing of these parallel strategies strongly influences the overall efficiency of the cluster. Not optimized tensor parallelism often traps clusters in intensive NVLink synchronization phases, thus consuming a huge amount of inter-GPU static power. Future energy-aware compilers must integrate hyperparameter auto-tuners that calculate exact thermal and synchronization impedance before allocating LLM partition chunks, effectively slashing the hidden network energy cost associated with misaligned topologies [248]. A key operational strategy for green AI training is to mitigate peak fossil-fuel consumption in the electricity grid. Traditionally, schedulers deploy Suspend/Resume architectures (completely pausing the cluster and creating checkpoints when green energy drops). However, this severely penalizes the return on investment in equipment. Current state-of-the-art platforms bypass crude suspension entirely in favor of Carbon Elasticity. By adapting in real time and transparently the actual dimensions of distributed ML training (by adjusting batch size and number of active workers according to the carbon intensity of the network), elastic AI environments enable additional savings of 37% to 51% on the total carbon footprint without suffering crippling synchronization delays. [249]. Rather than training AI models with petabytes of highly redundant token distributions, significant power savings are increasingly achieved before VRAM allocation through data-centric AI. Modern evolution-based and data-centric training topologies use "elite sampling" engines to mathematically isolate only hypervariant feature data within a training corpus. By dynamically compressing to only 10% the footprint of the data used, data centers completely avoid redundant epoch execution, thus significantly reducing the continuous uptime of the servers by 98% without substantially penalizing the accuracy of multi-class AI inference [166, 168]. R.N. Tchakoute and C. Tadonki: Preprint submitted to Elsevier

While large language models is a dominant topic in public discourse, industrial hyperscalers devote the vast majority of their continuous inference energy to running Deep Learning techniques in Recommender Systems (RecSys). Systematic evaluation pipelines allow for rigorous tracing of the Pareto frontier between the accuracy of RecSys clicks and carbon emissions. The evaluation of dozens of distinct algorithmic architectures demonstrates that achieving the last 1% of recommendation accuracy frequently results in a penalty of roughly 40% in carbon emissions. By natively mapping these boundaries, engineers can mathematically select slightly smaller matrices that drastically reduce the company’s operational carbon emissions [250]. Finally, a major aggravating factor in GenAI’s carbon crisis is the low sharing of academic and corporate artifacts. When training large language models specifically designed for software engineering, the initial energy expenditure is noticeable. Large-scale literature reviews reveal that nearly 40% of research institutions and companies do not share their compiled artifacts or model weights, forcing researchers to rerun redundant and extremely computationally intensive training paradigms [58].

7.2. What About Inference ? While pre-training dominates headlines, hyperscaler telemetry from 2024–2026 indicates that Inference now accounts for the vast majority of the overall AI energy footprint. It is very important to characterize and understand the differences between training and inference power consumption patterns [159]. Given that Service Level Objectives (SLOs) [132] for public LLM endpoints require extremely low latency targets, commercial clusters often keep a large number of GPUs at high-voltage during idle states (because wake-up overhead could impact performance), just waiting for the next avalanche of prompts [251]. To resolve this ongoing energy drain, automated environment orchestrators (e.g., DynamoLLM) use massive search space formulations to continuously and asynchronously reconfigure dynamic LLM instances. By performing automatic and real-time adjustments of cluster dimension, clock frequency, and tensor model parallelism in response to fluctuations in inference queues, modern streaming platforms manage to save up to 50% of their total operational carbon footprint without ever violating underlying web latency service level objectives (SLOs). [164]. Furthermore, recent sophisticated energy profilers unequivocally demonstrate that the power consumption profile of inference cannot be considered as uniform. Processing an LLM typically follows two phases: the prefill phase and the decode phase. The prefill phase (which processes the user prompt) mainly involves compute-bound matrix-matrix multiplications, which therefore instantly puts the GPU cores at their highest voltage [84]. Conversely, the Decode phase (which generates tokens one-by-one) translates into strictly memory-bandwidth bound operations, leaving the

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ALU unsolicited while wasting a huge amount of static highbandwidth memory (HBM) energy. New-generation inference schedulers proactively apply decoupled DVFS policies based on tokenization state, maximizing clock frequencies during the prefill phase and significantly reducing logic voltages during the decode phase to reduce inference carbon by more than 25% [172, 130]. To prevent hallucinations and access real-time corporate data, enterprises primarily deploy LLMs via RetrievalAugmented Generation (RAG) pipelines. From an energy perspective, a RAG pipeline creates a severe infrastructure strain: before the LLM generates a response, the system must execute an approximate nearest neighbor (ANN) search across a massive vector database, which involves a large pool of compute nodes that continuously execute memoryintensive tasks. Integrating these retrieved documents into the LLM significantly expands the context window. Maintaining the Key-Value (KV) Cache in the GPU’s VRAM prevents the model from recomputing tokens, but consumes massive dynamic power. A massive paradigm shift revealed in early 2026 directly links this caching physics to external grids through Carbon-Aware Prompt Caching. Because the network is heavily powered by fossil fuels, instead of blindly discarding cached requests via generic LRU algorithms, sophisticated broadcast platforms artificially extend the retention lifetime of massive request matrices directly in VRAM, thus ensuring that subsequent identical requests retrieve pre-computed tokens to physically avoid massive, carbon-emitting redundant recalculations [84, 172]. The most advanced AI paradigms rely on autonomous agents and multi-step reasoning models. Rather than directly answering a prompt, an agent breaks it into sub-tokens, perform searching (e.g., over the web), generates and runs intermediate codes, performs self-evaluation, and so on (iterates). This introduces a hidden Recursive Energy Multiplier. A single user interaction might trigger 50 background inference calls before a final answer is produced. Advanced 2026 architectures (such as the PEARL framework) explicitly perform Performance/Energy-Aware Routing for LLMs. By dynamically intercepting prompts and distributing them asymmetrically between massive monolithic models and lightweight edge models — evaluating semantic complexity in real-time along with active clusters power — orchestrators maintain optimal reasoning accuracy while efficiently reducing the recursive energy multiplier [230, 173]. Historically, the primary constraints in Deep Learning were execution time (latency) and the amount of GPU VRAM. To deploy increasingly large models, algorithmic compression techniques have been developed. Initially designed to minimize time-to-solution through the corresponding hardware speed-up, these techniques were subsequently redesigned to address energy-to-solution. The fundamental principle underlying this adaptation is the physics of silicon: reading data from HBM memory consumes much more joules than the actual ALU calculation.

However, each new generation of techniques introduces serious technical limitations and energy trade-offs. Pruning and Network Compression: Earliest compression techniques consisted of algorithmically identifying and removing redundant weight matrices. By removing certain parameters, the total number of multiplication-accumulation (MAC) operations decreases. However, early "unstructured" pruning randomly removed weights, thus creating a Sparsity Trap. The systolic arrays of modern GPUs are highly optimized for dense matrix operations. An unstructured sparse matrix forces the GPU to load zeros into memory and multiply by zero anyway, which does not allow for any energy savings on modern accelerators. Knowledge Distillation: Distillation trains a lightweight "Student" model to mimic a large "Teacher" model. Replacing, for example, a 1000W cloud inference query with a 5W Edge NPU query on a model with 8 billion parameters reduces operational energy consumption per token by nearly 200 times. However, distillation only shifts the energy load backwards, requiring a huge initial carbon investment to execute the Teacher’s forward passes, which often requires millions of Edge inferences to compensate. Neural Architecture Search (NAS): Hardware-aware Neural Architecture Search (HW-NAS) injects physical constraints directly into the reward function to discover ideal silicon topologies. However, the search process evaluates thousands of permutations, emitting carbon equivalent to that of five standard cars [155]. To overcome this problem, modern frameworks rely on training performance estimation (TPE), using early stop variants to abruptly interrupt training as soon as energy thresholds diverge from accuracy slopes, thus recovering up to 90% of the search phase energy [252]. Beyond simply rejecting parameters, NAS pipelines actively replace fundamental mathematical operations. Advanced architectures assign custom hardware-friendly inference operators (such as deep-shift or multiplication-free kernels) directly into the DNN structure layer by layer, thus outperforming comparable mixed-precision algorithms by prioritizing the simplification of operations [157]. Precision Scaling and Quantization: Instead of removing parameters, quantization reduces their bit-width. The energy cost of arithmetic (resp. memory) operations scales quadratically (resp. linearly) with bit-width. Recent hardware advances have introduced precision-tailored architectures (e.g., 5.3-bit Block Floating Point formats) that definitively conquer the historic sub-8-bit dynamic range limitations [27]. However, as the community attempts to push quantization to extreme limits, a structural limitation in the representation arises. Disruptive 2025 frameworks such as LUT-DLA break this limit by substituting scalar computation with vector-quantized Look-Up Tables (LUT), resulting in an impressive area efficiency gain of ≈ 146× [28]. Mixture of Experts (MoE) and Speculative Decoding: Recognizing the limits of extreme quantization has led to considering the alternative of dynamic sparsity at runtime. MoE uses a router to activate only a sparse subset of "Expert"

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7.3. Evolution of Compression in Green AI

Energy-Aware Computing in 2026

7.4. Decentralization: Fog and Mobile Edge The ultimate optimization of the infrastructure is to offload heavy computing loads from centralized hyperscalers to intermediate Mobile Edge Computing (MEC) and Fog platforms. Handling the extreme mobility of nodes and decentralized energy ceilings requires replacing hierarchical managers with complex algorithmic coordination. The use of rigorous game theory approaches to offload computation to the mobile cloud allows heterogeneous devices with limited autonomy (battery-powered) to act as autonomous economic agents [253, 254, 255]. By mathematically modeling the significant penalty of transmission bandwidth delays compared to the relief provided by offloading localized computations [256], MEC architectures routinely calculate localized Nash equilibria [137]. This structurally prevents decentralized systems from saturating intermediate cloud proxies with computations, thus ensuring optimal and uniform battery survival margin across thousands of highly asynchronous edge appliances [257]. Small language models (SLMs), typically less than 10 billion parameters and optimized by quantization, allow efficient on-device inference on consumer platforms. Empirical lifecycle case studies validate this transition, demonstrating that migrating generative AI inference from centralized cloud infrastructures directly to edge platforms can generate energy savings of over 90%, while significantly reducing water consumption and carbon footprint through the elimination of network and cloud cooling costs [102, 103, 258]. Expanding Edge capabilities requires that local mobile clusters not only run inferences, but continuously customize models via parameter-efficient fine-tuning (PEFT) mechanisms, such as low-rank adapting (LoRA), physically bypassing full gradient weight updates to safely retrain models without inducing thermal throttling. Federated Learning (FL) prevents centralized data concentration at the expense of a detrimental "wooden barrel

R.N. Tchakoute and C. Tadonki: Preprint submitted to Elsevier

effect" regarding carbon emissions. Bidirectional transmission of gigabytes of gradient updates over high-frequency RF networks typically consumes much more radio power than localized computations [17, 259, 165]. To address this problem in a targeted way, orchestrators perform continuous monitoring based on game theory (e.g., via MARL controllers) to adjust the inclusion of edge-client parameters. Frameworks like CLOVER replace random client inclusion with rigorous participant selection based on their carbon footprint. By mathematically evaluating the instantaneous carbon states of the local power grid alongside the computing speeds of the devices, the orchestrators selectively collect data that forces global convergence while artificially reducing FL carbon emissions by 25% [260, 261]. Historically, carbon-aware spatial shifting was strictly limited to the Cloud. Innovative research conducted in mid2025 establishes the effectiveness Mesoscale Spatial Shifting. Architectures such as the CarbonEdge framework dynamically track localized variations in "mesoscale" carbonintensity within interconnected geographic regions. By intelligently micro-migrating CDN workloads between geographically adjacent peripheral hubs with low transient carbon differences, modern orchestrators are able to achieve emission reductions of more than 78% without triggering latencies of more than 5 milliseconds [262].

7.5. Main Trends in Green AI By analyzing the rapidly expanding field of green AI (45 papers), the bibliometric trend reflects the commercial pivot from model creation to model deployment. While pretraining of massive reference models initially dominated the discourse, currently only 27% of our selected papers target optimizations of the training phase (e.g., Carbon Elasticity, Data-centric pruning, ...). Conversely, 42% of recent studies explicitly target inference optimizations, encompassing RAG KV-Cache management, Agentic routing, and algorithmic compression (MoE, Quantization). The remaining 31% addresses Decentralization, heavily exploring Federated Learning limits and Small Language Models (SLMs) on Edge devices. This confirms that the main challenge of current research (2025 and 2026) is to minimize the continuous and ubiquitous energy consumption of GenAI services. % of Surveyed Papers

sub-networks per token, thereby decoupling the total storage capacity from the active compute footprint. However, this creates a VRAM Leakage Paradox: Although MoE reduces the power consumption of the dynamic ALU, it requires the entire massive model to reside in the HBM, resulting in significant static power loss, thus greatly limiting its effectiveness on power-constrained deployments. Approximate Accelerators for Transformers: For spatial mapping engines such as Vision Transformers (ViTs), general approximate computing has shown a negative impact on deep-learning convergence. Advanced methodologies (e.g., the TransAxx framework) now securely insert approximate arithmetic multipliers directly into ViT execution paths. Using Monte Carlo Tree Search (MCTS) algorithms allow to efficiently search the space of possible configurations to perform Vision Transformer (ViT) with structurally defective mathematical chips, thereby enabling an noteworthy reduction in hardware power consumption while preserving visual quality [37].

42 40

31

27

20 0 Inference & RAG Edge & FL

AI Training

Figure 7: Quantitative overview of Green-AI literature.

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Energy-Aware Computing in 2026

8. Advanced Cooling Systems As time goes on, the abstractions of software scheduling and algorithmic compression eventually run up against the unavoidable laws of thermodynamics. All the electrical energy consumed by a computer system is eventually dissipated as heat. Historically, data center cooling was considered a secondary issue at the facility level. Today, the thermal density of Exascale and GenAI workloads has transformed cooling into the primary bottleneck, determining whether a processor can keep running at its peak FLOPs.

8.1. Air Cooling and Rack Density The thermal capacity of air is fundamentally insufficient for modern high-density architectures. Traditionally, the power consumed by Computer Room Air Conditioning (CRAC) units represents up to 40% of a facility’s total energy. To combat this via software, conventional "ThermalAware Schedulers" proactively balanced CPU loads spatially across different racks to eliminate physical hot spots, thus allowing CRAC compressors to safely step down their power levels. However, the shift from provisioning for a single server to that of large AI infrastructures has shattered these parameters at the rack-scale. A single NVIDIA GB300 (Blackwell Ultra) NVL72 rack integrates 72 GPUs and 36 CPUs, drawing more than 120 kW in a single physical cabinet. Trying to cool a 120 kW rack by pure ventilation would require localized winds of exceptional magnitude, which would create acoustic damage and consume more energy for the fans than for the processors. Consequently, the industry has unanimously recognized that for any rack exceeding roughly 35 kW, air cooling is no longer a viable solution.

8.2. Advanced Liquid Cooling Paradigms To manage the massive heat flows associated with AI processing, facilities have turned to liquid cooling, which, compared to air, has thermal capacities up to 4 times greater and thermal conductivities 20 to 100 times higher. Liquid Cold Plate and the Temperature Paradox: D2C (or Cold Plate) technology circulates a cold liquid directly over micro-convective blocks mounted on CPU, GPU, and memory chips. To maximize facility-level PUE, data centers increasingly supply "hot water" (18◦ 𝐶 to 25◦ 𝐶) rather than chilled water, thereby significantly reducing chiller plant power. However, this introduces a serious systemic paradox: the use of warmer inlet water reduces the energy consumption of cooling but inadvertently causes temperature spikes in the silicon chips. This physically exacerbates the leakage current of the transistors and suddenly triggers a localized DVFS limitation, thus introducing serious execution delays in synchronized MPI workloads that often wipe out the initial cooling energy savings [76]. Intelligent Cooling Controllers and Joint ThermalWorkload Orchestration: Traditionally, computer room air conditioning units (CRAC units) operated from static thresholds unrelated to server states. Nowadays, temperature is recognized as an active variable that has a direct impact R.N. Tchakoute and C. Tadonki: Preprint submitted to Elsevier

on hardware transistor leakage. Systematic assessment of temperature-aware power models demonstrate that failing to account for the increase in ambient temperature of the incoming air significantly distorts theoretical CPU power consumption predictions. This has led to the deployment of "Joint Data Center Cooling and Workload Management". By merging these logical flows using deep reinforcement learning (DRL), schedulers algorithmically assign high-intensity thermal threads to nodes that exhibit optimal cooling airflow, thereby reducing the overall cooling power of the installation independently of the hardware’s P-states [134, 151, 150]. Single-Phase/Two-Phase Immersion: The most extreme cooling method involves fully immersing the server’s motherboard in a dielectric (non-conductive) fluid. In twophase immersion, the fluid boils directly upon contact with the silicon chip, exploiting the latent heat of vaporization to achieve unprecedented thermal densities with near-zero pumping power, thus enabling PUEs close to 1.01. Critical Limitation (The PFAS Regulation Crisis): While two-phase immersion was considered the future of green data centers, it has collided with a recent regulatory hurdle. The dielectric fluids initially required for boiling (e.g., 3M’s Novec) are primarily perfluoroalkyl and polyfluoroalkyl substances (PFAS) — "forever chemicals" exhibiting very high environmental and biological toxicity. Due to severe restrictions and bans from the European Union and the US Environmental Protection Agency (EPA) on PFAS manufacturing, the viability of two-phase immersion has plummeted, forcing hyperscalers to revert to highly complex D2C water configurations. [152].

8.3. Water and Power Usage Effectiveness Optimizing for power usage efficiency (PUE) raises a major environmental paradox regarding water consumption. Modern data centers often achieve exceptional PUE not through refrigeration compressors, but rather through evaporative cooling towers. The development of very high-density AI clusters requires enormous quantities of chilled water, which constantly evaporates into the atmosphere to release the heat dissipated from the data center. Merely estimating the raw volume of Water Usage Effectiveness (WUE) does not take into account the geographic hydrology. To address this critical gap, modern supercomputing assessments (such as the ThirstyFLOPS framework [85]) introduce the Adjusted Water Impact (AWI) indicator. The AWI takes into account the high spatial and temporal volatility of local water stress, demonstrating that a supercomputer consuming 1 million liters of water in the rainy Pacific Northwest region is ecologically harmless, while the same consumption in an arid environment would cripple local public infrastructure. Thus, modern green planning advocates actively anticipating periods of inactivity to offset intensive processing only during droughts [85]. In waterstressed regions, municipalities are increasingly refusing building permits for liquid-cooled data centers, despite their low carbon footprint. Therefore, the use of closed-loop "dry coolers" is now mandatory, which inherently leads to higher Page 14 of 26

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consumption of electrical energy (thus degrading the PUE) but saves water.

8.4. Heat Recovery and Energy Reuse As ICT-related electricity needs approach 4% or 5% of global demand, governments are no longer viewing data centers as mere consumers, but rather as potential localized thermal power plants. The focus has shifted from minimizing cooling overhead to maximizing the Energy Reuse Factor (ERF). A high heat output (e.g., a 60◦ −80◦ 𝐶 liquid from the cooling of an Exascale system) is potentially very valuable. Thanks to heat exchangers, this wasted energy can be used for external infrastructures: District Heating: Supercomputers such as LUMI (Finland) integrate their liquid cooling loops directly into Kajaani’s district heating network, thus taking advantage of fossil fuel combustion to heat thousands of local residential homes during the winter. Distributed Edge Heating (e.g., Qarnot Computing): Innovative European architectures completely decentralize data centers by installing cloud-based computing nodes (viewed here, from a thermal perspective, as electric radiators) directly within residential buildings. This "computingbased heating" approach achieves near 100% energy efficiency, thus offsetting the cooling costs of the facilities and that of associated infrastructure.

8.5. Oversizing and Simulation-Driven Design In the exascale ecosystem, the evaluation of millions of active sensor parameters reveals a rigid limit of data centers: facilities tend to have more installed computing devices than the electrical grid can run simultaneously. The operation of these legally "oversized" systems requires the direct integration of neural networks into the infrastructure of the facilities. Frameworks such as the Adaptive Power Management System (DPS) explicitly map workloads in real time via ML analysis, securely transferring power credits from idle peripheral logic cores exclusively to critical processing queues in order to keep peak Exaflops below regulatory power thresholds [107, 175]. An embarrassing reality arises from the mismatch between the rapid evolution of equipment and the long life cycles of infrastructure. A physical data center is amortized over 15 to 20 years, while new generations of AI accelerators are produced every 12 to 18 months. Upgrading a 2015 air-cooled facility to accommodate a 120 kW liquidcooled Blackwell rack (planned for 2026) is structurally and financially prohibitive. Future next-generation AI workloads demand bespoke "AI factories." Designing these extreme thermal infrastructures precludes any empirical approach in favor of formal methods. Global hyperscalers are increasingly relying on holistic operational simulators, a major one being the Carbon Explorer framework. This topology integrates the interaction between local geography, PUE degradation, and daytime renewable energy to mathematically advise on structural deployment trade-offs between battery CapEx and direct utility energy consumption, thus R.N. Tchakoute and C. Tadonki: Preprint submitted to Elsevier

enabling early exploration of sustainability-focused design space even before concrete realizations [263].

9. Power-aware Computing Perspectives The shift from a paradigm focused on absolute performance to one that considers strict energy constraints has highlighted corresponding conceptual gaps in modern computing. On the cusp of the exascale era and with the expansion of generative AI, addressing the energy crisis requires moving beyond iterative software optimization alone. Based on critical limitations identified across the Cloud-Edge-HPC continuum, we have outlined five major and disruptive future directions encompassing hardware, software telemetry, supply chain auditing, and global legislation. These aspects will shape the future of computing through 2030.

9.1. Advanced Measurement: OS and On-chip As highlighted in Section 5, current high-frequency monitoring relies heavily on user-space polling or kernellevel interrupts. This induces the "observer effect": continuously polling hardware registers, such as MSRs, frequently triggers context switches, thus saturating CPU caches, interrupting AI workloads, and artificially amplifying nodelevel power consumption, simply to measure it. For largescale telemetry with no overhead, the community is rapidly turning to the following two fundamental paradigms. Kernel-Bypass via eBPF: Extended Berkeley Packet Filter (eBPF) technology (e.g., CNCF Kepler) allows researchers to securely integrate event-driven polling programs directly into the Linux kernel, without requiring custom kernel modules. Currently, frameworks using eBPF represent the core of the state-of-the-art for containerized cloud deployments. By intercepting OS-level events, eBPF architectures accurately map the energy footprint of highly ephemeral microservices and serverless FaaS workloads that cannot be detected by traditional MSR polling, thus eliminating blind spots in energy consumption measurements of modern virtualized grids [109]. In-Network Telemetry via DPUs: To eliminate the monitoring task at the host CPU, Data Processing Units (DPUs) and SmartNICs (e.g., NVIDIA BlueField, AMD Pensando) are absorbing the telemetry stack. DPUs aggregate, compress, and stream time-series data directly into facility management pipelines via a dedicated PCIe path, thereby ensuring that host CPUs are exclusively dedicated to computation.

9.2. In-Memory Computing and Hardware Co-Design For decades, von Neumann architectures have separated the arithmetic logic unit (ALU) from main memory. In GenAI inference paradigms, transferring terabytes of LLMrelated data via PCIe buses and memory interconnects consumes roughly two orders of magnitude more energy than that of the arithmetic operations. Next-generation hardware must clearly eliminate this "memory wall". Page 15 of 26

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Memory Disaggregation via Compute Express Link: Historically, administrators oversized local server RAM to prevent AI workloads from crashing (due to lack of memory), resulting in terabytes of unused but powered DRAM throughout the facility. Currently, the transition to the CXL interconnect standard enables memory disaggregation, grouping petabytes of memory into distributed chassis that are dynamically accessible by any processor via PCIe logic. Decoupling memory allocations from physical hosts safely eliminates current leakage due to "unused memory," thereby reducing the ongoing carbon footprint of RAM (integrated and operational) in a data center by more than 25% [169, 161]. Near-Data Processing (NDP): Processing-in-Memory (PIM) and in-storage processing (ISP) mitigate data movement by offloading the instructions to the cores integrated with the main memory level. PIM architectures (e.g., UPMEM DIMMs and HBM-PIMs) fundamentally reverse the conventional hardware paradigm by moving the ALU directly inside the DRAM arrays, thereby reducing parasitic capacitance energy from the memory buses [264]. However, a significant loss of efficiency occurs during the conversion of memory voltages. Representing the elite architectural limits, the systems now utilize Analog-Mixed-Signal (AMS) capacitive coupling directly inside standard 6T and 8T SRAM matrices. The close association of XNOR multipliers with shared in-memory analog-to-digital converters (ADCs) [265] enables remarkable advances in the computation of binarized neural networks, achieving macroscopic efficiencies of nearly 490 TOPS/W through the complete elimination of column-dense read paths [266]. Chiplets and Heterogeneous Integration: Instead of manufacturing massive monolithic chips prone to significant current leakage, silicon is fragmented into "chiplets" using the UCIe (Universal Chiplet Interconnect Express) standard. This allows manufacturers to combine high-performance logic components etched at 2 nm with I/O and analog components etched at 6 nm, thus offering more concentrated power and more stable consumption. Architectural carbon footprint modeling frameworks, such as the Architectural 𝐶𝑂2 Footprint Tool (ACT), ECO-CHIP, and 3D-Carbon, empirically prove that the migration to heterogeneous integration (HI) strategies reduces embodied carbon emissions by 30% compared to traditional monolithic systems [35, 267, 268]. Wafer-Scale Systems and Carbon Dependency: While the traditional industry is turning to UCIe chiplets, the extreme counter-paradigm involves monolithic wafer-scale integration (WSI). Architectures like the Cerebras WaferScale Engine (e.g., the CS-3) completely abandon chiplets, sculpting an entire supercomputer from a single continuous silicon wafer. Recent life cycle assessments of the total Carbon-Delay Product (tCDP) have empirically concluded that, despite the huge manufacturing challenges of waferscale processors, their complete elimination from off-chip diffusion dies generates a design space with uniquely optimized carbon performance [38]. R.N. Tchakoute and C. Tadonki: Preprint submitted to Elsevier

Photonic computing: Replacing copper interconnects with photonic (light-based) data buses significantly reduces energy consumption related to static impedance, thus overcoming memory bandwidth limitations. Next-generation frameworks (such as the open-source tool EPiCarbon) demonstrate that photonics far surpasses traditional semiconductors structurally: manufacturing the hardware requires at least 4.1 times less manufacturing energy (embedded carbon) while offering significantly higher yields than equivalent-sized CMOS chips [34]. By considering moderate and aggressive photonic scaling, frameworks such as Albireo and ROCKET show that EDP and Energy can be reduced by at least 229× when compared to state-of-the-art electronic accelerators and GPUs on AI workloads [46, 269]. Neuromorphic Computing vs Analog Computing: For edge endpoints, pulsed neural networks mimic the biological brain by performing calculations only during discrete events. This enables the design of true "event-driven silicon", reducing standby power consumption to a few microwatts [25]. Furthermore, analog computing natively processes deep neural networks in the continuous load domain. Recent advances in mixed-signal and charge-based multiplyadd cores allow matrix algebra to be run at the fundamental thermal noise limit, thue leveraging large onboard capacitor arrays to routinely reduce computing power consumption by more than 37% compared to equivalent dense digital logic paths.

9.3. Operational Carbon vs Embodied Carbon Until now, the green software community has primarily focused on operational carbon (emissions mainly related to operational electricity consumption). However, with the rapid decarbonization of power grids, the operational footprint of a cluster ideally tends toward zero. Consequently, the predominant environmental impact of computing is shifting toward embodied carbon, which corresponds to the significant greenhouse gas emissions associated with semiconductor manufacturing, rare earth mining, server production, and transportation activities[270, 271]. Life cycle assessment (LCA) studies unequivocally state that the exponential proliferation of custom AI architectures necessitates a unified Pareto LCA frontier; hyperscale environments must quantitatively balance the operational carbon savings of an ASIC with the much larger carbon footprint required for semiconductor manufacturing. Replacing server arrays every two to three years structurally prevents data centers from achieving carbon neutrality, regardless of their power usage efficiency (PUE) [272, 273]. Lifecycle-Aware Software and System Sustainability: Software overload and unoptimized libraries inevitably lead to premature hardware obsolescence. We anticipate a paradigm shift toward software lifecycle engineering, where software is explicitly optimized to maintain backward compatibility, thereby extending the operational lifespan of a data center’s IT equipment from 3 to 7 years [59, 274]. To address this problem structurally, the software engineering community is mandatorily integrating sustainability across Page 16 of 26

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four key dimensions: environmental, economic, social, and technical. Integrating global sociological and economic constraints directly into developers’ workflows ensures that they prioritize compatibility with moderately innovative architectures by deliberately limiting algorithmic feature extensions that absolutely require next-generation hardware. Analytical Modeling and Rebound Effects: Establishing rigorous parameterized baselines (such as the FirstOrder analytical CArbon modeL (FOCAL) [74]) inherently isolates rebound effects (the Jevons Paradox). In-depth assessments clearly highlight that when cloud instances achieve significant efficiency gains, the absolute capacity of data centers tends to increase primarily to absorb the financial benefit associated with the energy margin. New analytical criteria make it possible to decouple this cycle by mathematically defining the strict limits necessary to transform "weakly" sustainable operational accelerators into closed-loop and strictly controlled life cycle assessments (LCAs), thus guaranteeing overall societal reduction margins in relation to the expansion of digital consumption habits [136, 42, 275, 276, 117].

9.4. Compliance with Standards and Regulations The development of green IT is driven more by regulatory incentives than technological ones. Sustainable IT will now move from a voluntary initiative, driven by corporate social responsibility (CSR), to a globally audited regulatory compliance framework. Macro-Policy and Granular Reporting: Under the European Energy Efficiency Directive (EED), data centers with computing power exceeding 500 kW are legally required to publish comprehensive sustainability indicators. In parallel, the Corporate Sustainability Reporting Directive (CSR) subjects IT companies to rigorous emissions audits related to scopes 1, 2, and 3 [277]. Current corporate sustainability reports fundamentally obscure critical architectural realities beneath broad overviews. In-depth analyses of computer hardware reveal a growing and unreported disparity: the absolute carbon footprint of local integrated circuits is increasing independently year after year. To put an end to this "greenwashing", future compliance initiatives must require extremely accurate reporting of hardware components [278, 279]. The EU AI Act and Ethical Prompts: Specific to the software field, the final clauses of the European AI Act require creators of general-purpose AI (GPA) to explicitly document the energy consumption and overall ecological footprint associated with training their fundamental models [280]. According to our vision of the 2030 Sustainable Development Roadmap, governance is undeniably shifting from training centers to the user interface. New paradigms of "ethical prompt engineering" (EPE) integrated into interactions impose auditable compliance controls specific to recovery architectures. EPE structurally limits unrestricted LLM requests by treating user prompts as versioned constraints specifically designed to block the execution of

R.N. Tchakoute and C. Tadonki: Preprint submitted to Elsevier

resource-intensive or redundant models before they trigger the hardware logic layer [281, 62]. Digital Sustainability Labels: The criteria for acquiring computer equipment are crystallizing around ecolabels (e.g., EPEAT and Energy Star). In order to fill this regulatory gap at the software level, international consortia have published the "Green Software Measurement Model" (GSMM) [16]. This validated reference model standardizes how auditors empirically and dynamically extract resource efficiency gains from isolated software products. Furthermore, running models like the GSMM enables the imminent transition to software sustainability labels; European and international legislation now requires enterprise software suites to actively calculate and display, in real time, "green labels" similar to energy labels for appliances [278]. Economic Catalysts and Carbon Market Exchanges: To enforce global thermodynamic limits, providers are natively integrating energy-efficient algorithmic structures into their middleware. Emerging cloud brokers are deploying fully automated carbon trading data markets. Drawing inspiration from Nash auction systems, geodistributed Kubernetes clusters actively trade and bid for prioritized execution windows, exclusively during periods of high renewable energy production (e.g., local solar power peaks). By monetizing carbon allowances, the hypervisor infrastructure inherently prevents network capacity overflows and incentivizes edge users to dynamically suspend lower-priority tasks in exchange for direct financial dividends, thus realizing "green AI" through a rigid market capitalization [93, 153, 282]. Furthermore, large-scale operations conducted onboard the Fugaku supercomputer have deployed robust and operational "incentive-based energy efficiency programs" [133]. By directly returning to the teams of supercomputers, who voluntarily activated deeper P states in their scientific codes, a digital currency corresponding to their exact use, the system administrators have concretely validated that gamification on an institutional scale effectively redirects collective behaviors in order to optimize planetary impact. Microgrids and Wind Energy Deployments: The development of zero-carbon integrations requires the dismantling of traditional facilities. To address the drastic restrictions on distribution lines that are hindering the global energy transition to wind power, the macroeconomic frameworks of July 2025 advocate the dynamic deployment of high-performance data center equipment directly within local wind farms [283, 154]. Placing the AI training logic close to the power generation source acts as a highly elastic storage buffer. This proximity configuration systematically absorbs and modulates the raw transient power well before it is transmitted over high-voltage municipal power lines, thus minimizing extreme losses due to voltage conversion and significantly increasing the overall capacity factors of the power grid. Operators are deploying architectures such as PowerMorph as part of demand management contracts. By precisely manipulating the electrical footprint of QoSaware servers to the microsecond, the data center acts as an electrical regulation well, rapidly stabilizing the AC Page 17 of 26

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frequency of the regional electrical grid for significant financial gains. [284]. Within the framework of pan-European projects (Green.Dat.AI), strict structural "data spaces" harmonize semantic datasets well before the activation of deep learning architectures [285].

10. Conclusion Over the past decade, energy consumption has shifted from a secondary operating expense to the primary physical, financial, and environmental bottleneck in the computing ecosystem. As this comprehensive survey demonstrates, the challenge of energy-aware computing is ubiquitous across the entire cloud-edge-HPC continuum. From low-power microcontrollers performing milliwatt-scale inferences to exascale supercomputers of hundred-megawatt AI data centers, the laws of thermodynamics impose absolute limits on performance scaling. The rapid proliferation of generative artificial intelligence, LLM inference pipelines, and agentic AI workflows has accelerated the energy crisis. The traditional response, which relies solely on semiconductor manufacturing to produce low-power transistors, is no longer sufficient. Genuine sustainability requires a comprehensive and cross-cutting overhaul of the entire ecosystem. We have established that cutting-edge chips rely on extreme hardware heterogeneity, memory disaggregation (CXL), and drastic precision reduction (FP4/LUT) to maintain AI throughput. However, to measure this efficiency, the software community must overcome virtualization-related hurdles by deploying overhead-free eBPF polling tools, predictive tracing models for transformers, and reproducible carbon tracking that avoids the standard overhead of memory jump registers (MSRs). Furthermore, static code optimizations and energy-efficient compilation must be tightly integrated with dynamic schedulers. These orchestrators require advanced particle swarm optimization and deep reinforcement learning techniques to seamlessly ensure workload consolidation, C-state latency balancing, and energyefficient spatiotemporal shifting. Finally, as air cooling reaches its absolute physical limits, liquid-to-chip infrastructure, intelligent DRL HVAC controllers, and waste heat recovery (energy reuse factor) must be standardized, thus bridging the severe gap between 15-year facility lifecycles and 18-month GPU iterations. As is widely documented in the field of sustainable digital infrastructure, addressing the energy crisis requires viewing computing limits as a multidisciplinary continuum. The transition to a net-zero carbon architecture necessitates abandoning the historical criterion of raw performance at all costs. By leveraging renewable sources intrinsically linked to dynamic planning, establishing rigorous transparency to combat the rebound effects of embodied carbon, and directly integrating environmental indicators into global legislation (e.g., the European AI law and CSRD mandates), the research and industry communities can successfully transition

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to the era of exascale AI while respecting the energy constraints of our time [286].

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