Standard ECMA-272 2 n d E dition - J une 1999
Standardizing
Information
and
Communication
Systems
120 mm DVD Rewritable Disk (DVD-RAM)
P h o n e : + 4 1 2 2 8 4 9 . 6 0 . 0 0 - F a x : + 4 1 2 2 8 4 9 . 6 0 . 0 1 - U R L : h t t p : / / www. e c m a . c h - I n t e r n e t : h e l p d e s k @ e c m a . c h
.
Standard ECMA-272 J une 1 9 9 9
Standardizing
Information
and
Communication
Systems
120 mm DVD Rewritable Disk (DVD-RAM)
P h o n e : + 4 1 2 2 8 4 9 . 6 0 . 0 0 - F a x : + 4 1 2 2 8 4 9 . 6 0 . 0 1 - U R L : h t t p : / / www. e c m a . c h - I n t e r n e t : h e l p d e s k @ e c m a . c h MB ECMA-272.DOC
25-06-99 15,06
.
Brief History ECMA Technical Committee TC31 was established in 1984 for the standardization of Optical Disks and Optical Disk Cartridges (ODC). Since its establishment, the Committee has made major contributions to ISO/IEC toward the development of International Standards for 80 mm, 90 mm, 120 mm, 300 mm, and 356 mm media. Numerous standards have been developed by TC31 and published by ECMA, almost all of which have also been adopted by ISO/IEC under the fast-track procedure as International Standards. In February 1997 a group of ten Companies, known as the DVD Forum, proposed to TC31 to develop standards for the optical disks known as DVD-Read-Only disks. TC31 adopted this project and started the work that has lead to standards ECMA-267 (1997) ECMA-268 (1997)
120 mm DVD-Read-Only Disk 80 mm DVD-Read-Only Disk
Further work has been undertaken for a rewritable disk known as DVD-RAM and for a case for such disks. This work is supported by nine members of the DVD Forum. It has led to the present ECMA Standard and to Standard ECMA-273 (1998)
Case for 120 mm DVD Rewritable Disk (DVD-RAM)
Work on standards for volume and file structure for these standards is in progress in ECMA Technical Committee TC15. This ECMA Standard specifies two Types of rewritable optical disks with a nominal capacity of 2,6 Gbytes and 5,2 Gbytes. It has been adopted by ISO/IEC as International Standard ISO/IEC 16824. These disks can be contained in one of the Types of case specified in Standard ECMA-273 and, thus, be used as an optical disk cartridge.
Adopted as 2nd edition of Standard ECMA-272 by the General Assembly in June 1999.
.
- i -
Table of Contents Section 1 - General
1
1 Scope
1
2 Conformance
1
2.1 Optical Disk 2.2 Generating system 2.3 Receiving system
1 1 1
3 Reference
1
4 Definitions
1
4.1 Case 4.2 Channel bit 4.3 Digital Sum Value (DSV) 4.4 Disk Reference Plane 4.5 Dummy substrate 4.6 Embossed mark 4.7 Entrance surface 4.8 Land and Groove 4.9 Mark 4.10 Phase change 4.11 Polarization 4.12 Recording layer 4.13 Sector 4.14 Space 4.15 Substrate 4.16 Track 4.17 Track pitch 4.18 ZCLV 4.19 Zone
1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 3 3
5 Conventions and notations
3
5.1 Representation of numbers 5.2 Names
3 3
6 List of acronyms
3
7 General description of the optical disk
3
8 General requirements
4
8.1 Environments
4
8.1.1 Test environment 8.1.2 Operating environment 8.1.3 Storage environment 8.1.4 Transportation
4 5 5 5
8.2 Safety requirement 8.3 Flammability
5 5
- ii -
9 Reference Drive
5
9.1 Optical Head 9.2 Read channels 9.3 Rotation speed 9.4 Disk clamping 9.5 Normalized servo transfer function 9.6 Reference Servo for axial tracking 9.7 Reference Servo for radial tracking
5 6 6 6 7 7 8
Section 2 - Dimensional, mechanical and physical characteristics of the disk
9
10 Dimensional characteristics
9
10.1 Overall dimensions 10.2 First transition area 10.3 Second transition area 10.4 Clamping Zone 10.5 Third transition area 10.6 Rim area 10.7 Remark on tolerances 10.8 Label
10 11 11 11 11 12 12 12
11 Mechanical characteristics
12
11.1 Mass 11.2 Moment of inertia 11.3 Dynamic imbalance 11.4 Sense of rotation 11.5 Runout
12 12 12 12 12
11.5.1 Axial runout 11.5.2 Radial runout
12 12
12 Optical characteristics
13
12.1 Index of refraction 12.2 Thickness of the transparent substrate 12.3 Angular deviation 12.4 Birefringence of the transparent substrate 12.5 Reflectivity
13 13 13 13 13
Section 3 - Format of information
14
13 Data format
14
13.1 Data Frames
14
13.1.1 Data ID 13.1.2 Data ID Error Detection code (IED) 13.1.3 Reserved bytes (RSV) 13.1.4 Error Detection Code (EDC)
15 16 16 16
13.2 Scrambled Frames 13.3 ECC Blocks 13.4 Recording Frames 13.5 Recording code and NRZI conversion 13.6 Recorded Data Field 13.7 DC component suppress Control (DCC)
17 17 19 20 21 22
13.7.1 DCC for the data in the Rewritable Area 13.7.2 DCC for the data in the Embossed Area
22 22
- iii -
13.7.3 PID and PED recording
23
14 Track format
23
14.1 Track shape 14.3 Track pitch 14.4 Track layout 14.5 Rotation speed 14.6 Radial alignment 14.7 Sector number
23 24 24 24 25 25
15 Sector format
26
15.1 Sector layout
26
15.1.1 Sector layout in the Rewritable Area 15.1.2 Sector layout in the Embossed Area
26 26
15.2 VFO fields 15.3 Address Mark (AM) 15.4 Physical ID (PID) fields 15.5 PID Error Detection code (PED) fields 15.6 Postamble 1 and Postamble 2 (PA 1, PA 2) fields 15.7 Mirror field 15.8 Gap field 15.9 Guard 1 field 15.10 Pre-Synchronous code (PS) field 15.11 Data field 15.12 Postamble 3 (PA 3) field 15.13 Guard 2 field 15.14 Recording polarity randomization 15.15 Buffer field
27 28 28 29 29 31 31 31 31 31 31 31 31 32
16 Format of the Information Zone
32
16.1 Division of the Information Zone 16.2 Lead-in Zone
32 34
16.2.1 Structure of Lead-in Zone 16.2.2 Initial Zone 16.2.3 Reference Code Zone 16.2.4 Buffer Zone 1 16.2.5 Buffer Zone 2 16.2.6 Control Data Zone 16.2.7 Connection Zone 16.2.8 Guard Track Zones 1 and 2 16.2.9 Disk Test Zone 16.2.10 Drive Test Zone 16.2.11 Reserved Zone 16.2.12 DMA 1 and DMA 2
34 34 34 34 35 35 39 40 40 40 40 41
16.3 Data Zone
41
16.3.1 Structure of Data Zone and of the Defect Management Areas (DMAs) 16.3.2 Guard Track Zones 16.3.3 Partitioning
41 41 41
16.4 Lead-out Zone
43
16.4.1 Structure of Lead-out Zone 16.4.2 DMA 3 and DMA 4 16.4.3 Reserved Zone 16.4.4 Guard Track Zone 1
43 43 43 43
- iv -
16.4.5 Drive Test Zone 16.4.6 Disk Test Zone 16.4.7 Guard Track Zone 2
43 43 43
17 Defect management
43
17.1 Defect Management Areas (DMAs) 17.2 Disk Definition Structure (DDS) 17.3 Spare sectors 17.4 Slipping Algorithm 17.5 Linear Replacement Algorithm 17.6 Primary Defect List (PDL) 17.7 Secondary Defect List (SDL) 17.8 Formatting of the disk
43 44 46 47 48 49 50 52
17.8.1 Full and Partial Certification 17.8.2 Initialization 17.8.3 Re-initialization 17.8.4 Data field number resulting from Initialization and Re-initialization
52 52 53 53
17.9 Write procedure 17.10 Read procedure
54 54
17.10.1 Blank ECC block 17.10.2 Read procedure
54 55
Section 4 - Characteristics of embossed information
55
18 Method of testing
55
18.1 Environment 18.2 Reference Drive
55 55
18.2.1 Optics and mechanics 18.2.2 Read power 18.2.3 Read channels 18.2.4 Tracking channel 18.2.5 Tracking
55 55 55 55 56
18.3 Definition of signals
56
19 Signals from lands and grooves
60
19.1 Push-pull signal 19.2 Divided push-pull signal 19.3 On-track signal 19.4 Phase depth 19.5 Wobble signal
60 60 61 61 61
20 Signals from Header fields
62
20.1 VFO 1 and VFO 2 20.2 Address Mark, PID, PED and Postamble 20.3 Signals from Header 1, Header 2, Header 3 and Header 4 20.4 Phase depth
62 62 63 63
21 Signals from Embossed Area
63
21.1 High Frequency (HF) signal
63
21.1.1 Modulated amplitude 21.1.2 Signal asymmetry 21.1.3 Cross-track signal
63 64 64
- v -
21.2 Jitter 21.3 Servo signal
64 64
21.3.1 Differential phase tracking error signal 21.3.2 Tangential push-pull signal
64 64
Section 5 - Characteristics of the recording layer
65
22 Method of testing
65
22.1 Environment 22.2 Reference Drive
65 65
22.2.1 Optics and mechanics 22.2.2 Read power 22.2.3 Read channel 22.2.4 Tracking
66 66 66 66
22.3 Write conditions
66
22.3.1 Write pulse 22.3.2 Write power
66 66
22.4 Definition of signals
67
23 Write characteristics
67
23.1 Modulated amplitude and Signal asymmetry 23.2 Jitter
67 67
Section 6 - Characteristics of user data
68
24 Method of testing
68
Annex A - Measurement of the angular deviation α
69
Annex B - Measurement of birefringence
71
Annex C - Measurement of the differential phase tracking error
73
Annex D - Reflectivity calibration and measuring method
77
Annex E - Tapered cone for disk clamping
79
Annex F - Measuring conditions for the operation signals
81
Annex G - 8-to-16 Recording code with RLL (2,10) requirements
83
Annex H - Definition of the write pulse
93
Annex J - Guideline for randomization of the Gap length, the Guard 1 length and the recording 95 polarity Annex K - Transportation
97
Annex L - Guideline for sector replacement
99
- vi -
.
Section 1 - General 1
Scope This ECMA Standard specifies the mechanical, physical and optical characteristics of a 120 mm optical disk to enable interchange of such disks. It specifies the quality of the recorded signals, the format of the data and the recording method, thereby allowing for information interchange by means of such disks. The data can be written, read and overwritten many times using the phase change method. This disk is identified as DVD-RAM. This ECMA Standard specifies − two related but different Types of this disk (see clause 7), − the conditions for conformance, − the environments in which the disk is to be tested, operated and stored, − the mechanical, physical and dimensional characteristics of the disk, so as to provide mechanical interchange between data processing systems, − the format of the information on the disk, including the physical disposition of the tracks and sectors, the error correcting codes and the coding method, − the characteristics of the signals recorded on the disk, thus enabling data processing systems to read the data from the disk. This ECMA Standard provides for the interchange of disks between optical disk drives. Together with a standard for volume and file structure, it provides for full data interchange between data processing systems. The optical disks specified by this ECMA Standard may be enclosed in cases according to Standard ECMA-273 as specified therein.
2 2.1
Conformance Optical Disk A claim of conformance with this ECMA Standard shall specify the Type implemented. An optical disk shall be in conformance with this ECMA Standard if it meets all mandatory requirements specified for this Type.
2.2
Generating system A generating system shall be in conformance with this ECMA Standard if the optical disk it generates is in accordance with 2.1.
2.3
Receiving system A receiving system shall be in conformance with this ECMA Standard if it is able to handle both Types of optical disk according to 2.1.
3
Reference The following standards contain provisions which, through reference in this text, constitute provisions of this ECMA Standard. At the time of publication, the edition indicated was valid. All standards are subjected to revision, and parties to agreements based on this ECMA Standard are encouraged to investigate the possibility of applying the most recent edition of the standards listed below.
4
ECMA-273
Case for 120 mm DVD-RAM Disks (1998)
ECMA-287
Safety of electronic equipment (1999)
Definitions For the purpose of this ECMA Standard the following definitions apply.
4.1
Case The housing for an optical disk, that protects the disk and facilitates disk interchange.
4.2
Channel bit The elements by which the binary values ZERO and ONE are represented by marks and pits on the disk.
- 2 -
4.3
Digital Sum Value (DSV) The arithmetic sum obtained from a bit stream by allocating the decimal value 1 to Channel bits set to ONE and the decimal value -1 to Channel bits set to ZERO.
4.4
Disk Reference Plane A plane defined by the perfectly flat annular surface of an ideal spindle onto which the clamping area of the disk is clamped, and which is normal to the axis of rotation.
4.5
Dummy substrate A layer which may be transparent or not, provided for the mechanical support of the disk and/or a recording layer.
4.6
Embossed mark A mark so formed as to be unalterable by optical means.
4.7
Entrance surface The surface of the disk onto which the optical beam first impinges
4.8
Land and Groove A trench-like feature of the disk, applied before the recording of any information, and used to define the track location. The groove is located nearer to the entrance surface than the land. The recording is made either on the centre of the groove or on the centre of the land.
4.9
Mark A feature of the Recording layer which may take the form of an amorphous domain, a pit, or any other type or form that can be sensed by the optical system. The pattern of marks and spaces represents the data on the disk.
4.10
Phase change A physical effect by which the area of a recording layer irradiated by a laser beam is heated so as to change from an amorphous state to a crystalline state and vice versa.
4.11
Polarization The direction of polarization of an optical beam is the direction of the electric vector of the beam. NOTE The plane of polarization is the plane containing the electric vector and the direction of propagation of the beam. The polarization is right-handed when to an observer looking in the direction of propagation of the beam, the endpoint of the electric vector would appear to describe an ellipse in the clockwise sense.
4.12
Recording layer A layer of the disk on, or in, which data is written during manufacture and/or use.
4.13
Sector The smallest addressable part of a track in the Information Zone of a disk that can be accessed independently of other addressable parts.
4.14
Space A feature of the recording layer which may take the form of a crystalline domain, a non-pit or any other type or form that can be sensed by the optical system. The pattern of marks and spaces represents the data on the disk.
4.15
Substrate A transparent layer of the disk, provided for mechanical support of the recorded layer(s), through which the optical beam can access a recording layer.
4.16
Track A 360° turn of a continuous spiral.
4.17
Track pitch The distance between centrelines of adjacent tracks (a groove and a land), measured in a radial direction.
- 3 -
4.18
ZCLV A disk format requiring Zoned Constant Linear Velocity operations.
4.19
Zone An annular area of the disk.
5 5.1
Conventions and notations Representation of numbers A measured value is rounded off to the least significant digit of the corresponding specified value. For instance, it implies that a specified value of 1,26 with a positive tolerance of + 0,01 and a negative tolerance of - 0,02 allows a range of measured values from 1,235 to 1,275. Numbers in decimal notations are represented by the digits 0 to 9. Numbers in hexadecimal notation are represented by the hexadecimal digits 0 to 9 and A to F in parentheses. The setting of bits is denoted by ZERO and ONE. Numbers in binary notations and bit patterns are represented by strings of digits 0 and 1, with the most significant bit shown to the left. Negative values of numbers in binary notation are given as Two’s complement. In each field the data is recorded so that the most significant byte (MSB), identified as Byte 0, is recorded first and the least significant byte (LSB) last. In a field of 8n bits, bit b(8n-1) shall be the most significant bit (msb) and bit b0 the least significant bit (lsb). Bit b(8n-1) is recorded first. A binary digit which can be set indifferently to ZERO or to ONE is represented by “x”.
5.2
Names The names of entities, e.g. specific tracks, fields, zones, etc. are given a capital initial.
6
List of acronyms AM BCA BPF DC DCC DDS DMA DSV ECC EDC FRM HF ID IED LPF LSN
7
Address Mark Burst Cutting Area Band Pass Filter Direct Current DC Component Suppress Control Disk Definition Structure Defect Management Area Digital Sum Value Error Correction Code Error Detection Code Forced Reassignment Marking High Frequency Identification Data ID Error Detection code Low Pass Filter Logical Sector Number
NRZ NRZI PA PDL PED PI PID PLL PO PS RS SDL SYNC Code VFO ZCLV
Non Return to Zero Non Return to Zero Inverted Postamble Primary Defect List P(ID) Error Detection code Parity of Inner-code Physical Identification Data Phase Locked Loop Parity of Outer-code Pre-Synchronous code Reed-Solomon code Secondary Defect List Synchronous Code Variable Frequency Oscillator Zoned Constant Linear Velocity
General description of the optical disk The optical disk that is the subject of this ECMA Standard consists of two substrates bonded together by an adhesive layer, so that the recording layer(s) is on the inside. The centring of the disk is performed on the edge of the centre hole of the assembled disk on the side currently read. Clamping is performed in the Clamping Zone. This ECMA Standard provides for two Types of such disks.
- 4 -
Type 1S
consists of a substrate, a single recording layer and a dummy substrate. The recording layer can be accessed from one side only. The nominal capacity is 2,6 Gbytes.
Type 2S
consists of two substrates and two recording layers. From one side of the disk, only one of these recording layers can be accessed. The nominal capacity is 5,2 Gbytes.
Alternatively, in Type 1S, the recording layer may be placed, for instance embossed, on the dummy substrate. When used with the case specified in Standard ECMA-273, a disk of Type 1S may be enclosed in either of the three case Types; a disk of Type 2S is to be enclosed only in a Type 1 case. Data can be written onto the disk as marks in the form of amorphous spots in the crystalline recording layer and can be overwritten with a focused optical beam, using the phase change effect between amorphous and crystalline states. The data can be read with a focused optical beam, using phase change effect as the reflective difference between amorphous and crystalline states. The beam accesses the recording layer through a transparent substrate of the disk. Part of the disk contains read-only data for the drive in the form of pits embossed by the manufacturer. This data can be read using the diffraction of the optical beam by the embossed pits. Figure 1 shows schematically the two Types.
E n tran c e su rfa ce S u b strate R ec o rd in g lay e r Typ e 1 S
A d h esiv e la y er D u m m y su b strate E n tran c e su rfa ce S u b strate R ec o rd in g lay er
Typ e 2 S
A d h esiv e la y er R ec o rd in g lay er E n tran c e su rfa ce
S u b strate
97-0122-A
Figure 1 - Types of 120 mm DVD-RAM disks
8
General requirements
8.1 8.1.1
Environments Test environment In the test environment, the air immediately surrounding the disk shall have the following properties. Temperature Relative humidity Atmospheric pressure
: 23 °C ± 2 °C : 50 % ± 5 % : 86 kPa to 106 kPa
No condensation on or in the disk shall occur. Before testing, the disk shall be conditioned in this environment for 48 hours minimum. It is recommended that, before testing, the entrance surface of the optical disk shall be cleaned according to the instructions of the manufacturer of the disk. Unless otherwise stated, all tests and measurements shall be made in this test environment.
- 5 -
8.1.2
Operating environment This ECMA Standard requires that a disk which meets all requirements of this ECMA Standard in the specified test environment shall provide data interchange over the specified ranges of environmental parameters in the operating environment. The operating environment is the environment where the air immediately surrounding the disk has the following properties. Temperature Relative humidity Absolute humidity Temperature gradient Relative humidity gradient
: 5 °C to 60 °C : 3 % to 85 % : 1 g/m3 to 30 g/m3 : 10 °C/h max. : 10 %/h max.
No condensation on the disk shall occur. If the disk has been exposed to conditions outside those specified above, it shall be acclimatized in the operating environment for at least 2 h before use. 8.1.3
Storage environment The storage environment is defined as an environment where the air immediately surrounding the disk shall have the following properties. Temperature Relative humidity Absolute humidity Atmospheric pressure Temperature gradient Relative humidity gradient
: -10 °C to 50 °C : 3 % to 85 % : 1 g/m3 to 30 g/m3 : 75 kPa to 106 kPa : 10 °C/h max. : 10 %/h max.
No condensation on the disk shall occur. 8.1.4
Transportation This ECMA Standard does not specify requirements for transportation; guidance is given in annex K.
8.2
Safety requirement The optical disk shall satisfy the safety requirements of Standard ECMA-287, when used in the intended manner or in any foreseeable use in an information processing system.
8.3
Flammability The disk shall be made from materials that comply with the flammability class for HB materials, or better, as specified in Standard ECMA-287.
9
Reference Drive The Reference Drive shall be used for the measurement of optical parameters for conformance with the requirements of this ECMA Standard. The critical components of this device have the characteristics specified in this clause.
9.1
Optical Head The basic set-up of the optical system of the Reference Drive used for measuring the overwrite and read parameters are shown in figure 2. Different components and locations of components are permitted, provided that the performance remains the same as that of the set-up in figure 2. The optical system shall be such that the detected light reflected from the entrance surface of the disk is minimized so as not to influence the accuracy of the measurements.
- 6 -
H R ad ial d irec tio n Ia
Id
1
+ +
I
H 1
Ib + +
Ic
Q u ad ra n t ph o to d etec to r
I
H2
Ia Ib Ic I d
R ea d C h an n el 1
+
R ea d C h an n el 2 Trac k in g C h a nn e l
H
2
3
+ +
4
G
A
B
D
C
E
F
97-0123-A
A B C D
Laser diode Collimator lens Polarizing beam splitter Quarter-wave plate
E
Objective lens
F G H1, H2, H3, H4 Ia, Ib, Ic, Id
Optical disk Quadrant photo detector d.c.-coupled amplifier Output currents from the quadrant photo detector
Figure 2 - Optical system of the Reference Drive The combination of polarizing beam splitter C and a quarter-wave plate D shall separate the entrance optical beam from a laser diode A and the reflected optical beam from an optical disk F. The beam splitter C shall have a p-s intensity reflectance ratio of at least 100. The focused optical beam used for writing and reading data shall have the following properties : +10 nm
a) Wavelength (λ)
650 nm -5 nm
b) Polarization circularly polarized light c) Polarizing beam splitter shall be used unless otherwise stated. d) Numerical aperture 0,60 ± 0,01 e) Light intensity at the rim of the pupil of the objective lens 30 % to 55 % of the maximum intensity level f) Wave front aberration 0,033 λ rms max. g) Relative Intensity Noise (RIN) of the laser diode 10 log [(a.c. power density/Hz) / d.c. light power] -134 dB/Hz max.
9.2
Read channels A Read channel 1 shall detect the total amount of light in the exit pupil of the objective lens. A Read channel 2 shall detect the differential output of the quadrant photo detectors. Frequency characteristics of the equalizer, characteristics of the PLL, slicer etc. are specified in annex F.
9.3
Rotation speed The actual rotation speed shall be within 1 % of the nominal rotation speed(s) specified in table 3.
9.4
Disk clamping Clamping force
: 2,0 N ± 0,5 N
- 7 -
Tapered cone angle
9.5
: 40,0° ± 0,5° (see annex E)
Normalized servo transfer function In order to specify the servo system for axial and radial tracking, a function Hs is used (equation I). It specifies the nominal values of the open-loop transfer function H of the Reference Servo(s) in the frequency range 23,1 Hz to 10 kHz.
3iω ωo 1 ω H s (iω ) = × o × iω 3 iω 1+ 3ω o 2
1+
(I)
where ω = 2πƒ ωo =2πƒo i=
−1
ƒo is the 0 dB crossover frequency of the open loop transfer function. The crossover frequencies of the lead-lag network of the servo are given by ƒ1 = ƒo × 1/3 ƒ2 = ƒo × 3
lead break frequency lag break frequency
9.6
Reference Servo for axial tracking For an open loop transfer function H of the Reference Servo for axial tracking, 1+H is limited as schematically shown by the shaded surface of figure 3.
G a in (d B ) 8 6 ,0
6 6 ,0 6 2 ,3 4 4 ,1 4 0 ,6
8 ,0 m / s
2
0
1 6 ,9
2 3 ,1 3 9 ,8
100
10 000
F req u e n cy (H z)
97-0164-A
Figure 3 - Reference Servo for axial tracking Bandwidth 100 Hz to 10 kHz 1 + H shall be within 20 % of 1+Hs.
- 8 -
The crossover frequency ƒo = ωo / 2π shall be specified by equation (II), where αmax. shall be 1,5 times larger than the expected maximum axial acceleration of 8 m/s2. The tracking error emax. shall not exceed 0,23 µm. Thus the crossover frequency ƒo shall be f0 =
1
3 α max
2π
e max
=
1
8 × 1,5 × 3
2π
0,23 × 10
−6
= 2 ,0 kHz
(II)
The axial tracking error emax. is the peak deviation measured axially above or below the 0 level. Bandwidth 23,1 Hz to 100 Hz 1 + H shall be within the limits defined by the following four points. ( 1 + Hs - 20% at 100 Hz ) ( 1 + Hs - 20% at 23,1 Hz ) ( 1 + Hs - 20% at 23,1 Hz add 20 dB) ( 1 + Hs + 20% at 100 Hz )
40,6 dB at 100 Hz 66,0 dB at 23,1 Hz 86,0 dB at 23,1 Hz 44,1 dB at 100 Hz Bandwidth 16,9 Hz to 23,1 Hz
1 + H shall be between 66,0 dB and 86,0 dB.
9.7
Reference Servo for radial tracking For an open-loop transfer function H of the Reference Servo for radial tracking, 1+H is limited as schematically shown by the shaded surface of figure 4.
G a in (d B ) 8 3 ,9
6 3 ,9 6 1 ,1 5 1 ,4 4 7 ,9
1 ,8 m /s
2
0
1 6 ,9
3 9 ,8
100
10 000
97-0165-A
F req u en c y (H z) Figure 4 - Reference Servo for radial tracking Bandwidth from 100 Hz to 10 kHz 1 + H shall be within 20 % of1 + Hs. The crossover frequency ƒo = ωo / 2π shall be specified by equation (III), where αmax. shall be 1,5 times larger than the expected maximum radial acceleration of 1,8 m/s2. The tracking error emax. shall not exceed 0,022 µm. Thus the crossover frequency ƒo shall be
- 9 -
f0 =
1
3 α max
2π
emax
=
1
1,8 × 1,5 × 3
2π
0,022 × 10
−6
= 3,0 kHz
(III)
The radial tracking error is the peak deviation measured radially inwards or outwards the 0 level. Bandwidth from 39,8 Hz to 100 Hz 1 + H shall be within the limits defined by the following four points. ( 1 + Hs - 20% at 100 Hz ) ( 1 + Hs - 20% at 39,8 Hz ) ( 1 + Hs - 20% at 39,8 Hz add 20 dB) ( 1 + Hs + 20% at 100 Hz )
47,9 dB at 100 Hz 63,9 dB at 39,8 Hz 83,9 dB at 39,8 Hz 51,4 dB at 100 Hz
Bandwidth from 16,9 Hz to 39,8 Hz 1 + H shall be between 63,9 dB and 83,9 dB.
Section 2 - Dimensional, mechanical and physical characteristics of the disk 10
Dimensional characteristics Dimensional characteristics are specified for those parameters deemed mandatory for interchange and compatible use of the disk. Where there is freedom of design, only the functional characteristics of the elements described are indicated. The enclosed drawings show the dimensional requirements in summarized form. The different parts of the disk are described from the centre hole to the outside rim. The dimensions are referred to two Reference Planes P and Q. Reference Plane P is the primary Reference Plane. It is the plane on which the bottom surface of the Clamping Zone (see 10.4) rests. Reference Plane Q is the plane parallel to Reference Plane P at the height of the top surface of the Clamping Zone. See figures 5 to 7.
d2
d2 1 5 ,0 0 m m m in . 97-0001-A
Figure 5 - Hole of the assembled disk
- 10 -
d Q
h
h
1
1
2
e 2
h
P d
e1
h
4
3
2 d
3 d4 d5 d6 d
7
97-0126-A
Figure 6 - Areas of the disk
h
h5
Q
7
e3
h
P
6 d
h8 7 d1
97-0127-A
Figure 7 - Rim area
10.1
Overall dimensions The disk shall have an overall diameter d1 = 120,00 mm ± 0,30 mm The centre hole of a substrate or a dummy substrate shall have a diameter + 0,15 mm
d2 = 15,00 mm
- 0,00 mm
e m ax. 1
- 11 -
The diameter of the hole of an assembled disk, i.e. with both parts bonded together, shall be 15,00 mm min., see figure 5. There shall be no burr on both edges of the centre hole. The edge of the centre hole shall be rounded off or chamfered. The rounding radius shall be 0,1 mm max. The height of the chamfer shall not exceed 0,1 mm. The thickness of the disk, including adhesive layer, spacer(s) and label(s), shall be + 0,30 mm
e1 = 1,20 mm
10.2
- 0,06 mm
First transition area In the area extending between diameter d2 and diameter d3 = 16,0 mm min. the surface of the disk is permitted to be above Reference Plane P and/or below Reference Plane Q by 0,10 mm max.
10.3
Second transition area This area shall extend between diameter d3 and diameter d4 = 22,0 mm max. In this area the disk may have an uneven surface or burrs up to 0,05 mm max. beyond Reference Planes P and/or Q.
10.4
Clamping Zone This zone shall extend between diameter d4 and diameter d5 = 33,0 mm min. Each side of the Clamping Zone shall be flat within 0,1 mm. The top side of the Clamping Zone, i.e. that of Reference Plane Q shall be parallel to the bottom side, i.e. that of Reference Plane P within 0,1 mm. In the Clamping Zone the thickness e2 of the disk shall be + 0,20 mm
e2 = 1,20 mm
10.5
- 0,10 mm
Third transition area This area shall extend between diameter d5 and diameter d6 = 44,0 mm max. In this area the top surface is permitted to be above Reference Plane Q by h1 = 0,25 mm max. or below Reference Plane Q by h2 = 0,10 mm max. The bottom surface is permitted to be above Reference Plane P by h3 = 0,10 mm max. or below Reference Plane P by h4 = 0,25 mm max. An Information Zone shall extend from diameter d6 to diameter + 0,0 mm
d7 = 117,2 mm
- 0,4 mm
- 12 -
10.6
Rim area The rim area shall extend from diameter d7 to diameter d1 (see figure 6). In this area the top surface is permitted to be above Reference Plane Q by h5 = 0,1 mm max. and the bottom surface is permitted to be below Reference Plane P by h6 = 0,1 mm max. The total thickness of this area shall not be greater than 1,50 mm, i.e. the maximum value of e1. The thickness of the rim proper shall be e3 = 0,6 mm min. The outer edges of the disk shall be either rounded off with a rounding radius of 0,2 mm max. or be chamfered over h7 = 0,2 mm max. h8 = 0,2 mm max.
10.7
Remark on tolerances All heights specified in the preceding clauses and indicated by hi are independent from each other. This means that, for example, if the top surface of the third transition area is below Reference Plane Q by up to h2, there is no implication that the bottom surface of this area has to be above Reference Plane P by up to h3. Where dimensions have the same - generally maximum - numerical value, this does not imply that the actual values have to be identical.
10.8
Label Type 1S disks not enclosed in a case of Type 1 shall have a label placed on the side of the disk opposite the entrance surface for the information to which the label is related. The label shall be placed either on an outer surface of the disk or inside the disk bonding plane. In the former case, the label shall not extend over the Clamping Zone. In the latter case, the label may extend over the Clamping Zone. In both cases, the label shall not extend over the rim of the centre hole nor over the outer edge of the disk.
11
Mechanical characteristics
11.1
Mass The mass of the disk shall be in the range 13 g to 20 g.
11.2
Moment of inertia The moment of inertia of the disk, relative to its rotation axis, shall not exceed 0,040 g.m2.
11.3
Dynamic imbalance The dynamic imbalance of the disk, relative to its rotation axis, shall not exceed 0,010 g.m.
11.4
Sense of rotation The sense of rotation of the disk shall be counterclockwise as seen by the optical system.
11.5 11.5.1
Runout Axial runout When measured by the Optical Head with the Reference Servo for axial tracking, the disk rotating at the scanning velocity, the deviation of the recorded layer from its nominal position in the direction normal to the Reference Planes shall not exceed 0,3 mm. The residual tracking error below 10 kHz, measured using the Reference Servo for axial tracking, shall not exceed 0,23 µm. The measuring filter shall be a Butterworth LPF, ƒc (-3dB) : 10 kHz, slope : -80 dB/decade.
11.5.2
Radial runout The runout of the outer edge of the disk shall not exceed 0,3 mm, peak-to-peak. The radial runout of tracks shall not exceed 50 µm, peak-to-peak.
- 13 -
The residual tracking error below 1,7 kHz, measured using the Reference Servo for radial tracking, shall not exceed 0,022 µm. The measuring filter shall be a Butterworth LPF, ƒc (-3dB) : 1,7 kHz, slope : -80 dB/decade. The rms noise value of the residual error signal in the frequency band from 1,7 kHz to 10 kHz, measured with an integration time of 20 ms, using the Reference Servo for radial tracking, shall not exceed 0,016 µm in the Rewritable Area and shall not exceed 0,025 µm in the Embossed Area (refer to clause 13). The measuring filter shall be a Butterworth BPF, frequency range (-3 dB) : 1,7 kHz, slope : +80 dB/decade to 10 kHz, slope : - 80 dB/decade.
12 12.1
Optical characteristics Index of refraction The index of refraction of the transparent substrate shall be 1,55 ± 0,10.
12.2
Thickness of the transparent substrate The thickness of the transparent substrate shall be a function of its index of refraction as specified in figure 8.
12.3
Angular deviation The angular deviation is the angle α between a parallel incident beam and the reflected beam. The incident beam shall have a diameter in the range 0,3 mm to 3,0 mm. This angle includes deflection due to the entrance surface and to unparallelism of the recorded layer, see figure A.1. It shall meet the following requirements when measured according to annex A.
12.4
In radial direction :
α = 0,70° max.
In tangential direction :
α = 0,30° max.
Birefringence of the transparent substrate The birefringence of the transparent substrate shall be 60 nm max. when measured according to annex B.
12.5
Reflectivity When measured according to annex D, the reflectivity of the recorded layer(s) shall be in the range 15 % to 25 %.
- 14 -
T h ick n e ss (m m ) (1 ,4 5 ; 0 ,6 4 3 )
0 ,6 4
(1 ,5 6 ; 0 ,6 3 0 ) (1 ,6 5 ; 0 ,6 3 0 )
0 ,6 2
0 ,6 0
0 ,5 8
(1 ,4 5 ; 0 ,5 8 3 )
(1 ,5 6 ; 0 ,5 7 0 )
1 ,4 0
1 ,5 0
(1 ,6 5 ; 0 ,5 7 0 )
1 ,6 0
1 ,7 0
In d ex of refrac tio n
96-0300-A
Figure 8 - Thickness of the substrate
Section 3 - Format of information 13
Data format The data received from the host, called Main Data, is formatted in a number of steps before being recorded on the disk. It is transformed successively into − − − − −
a Data Frame a Scrambled Frame an ECC Block a Recording Frame a Recorded Data Field
These steps are specified in the following clauses.
13.1
Data Frames A Data Frame shall consist of 2 064 bytes arranged in an array of 12 rows containing each 172 bytes (see figure 9). The first row shall start with three fields, called Data Identification Data (Data ID), ID Error Detection Code (IED), and Reserved bytes (RSV), followed by 160 Main Data bytes. The next 10 rows shall each contain 172 Main Data
- 15 -
bytes, and the last row shall contain 168 Main Data bytes followed by four bytes for recording an Error Detection Code (EDC). The 2 048 Main Data bytes are identified as D0 to D2047.
1 7 2 b y te s 4 b y tes
2 b y tes
6 b y tes
D a ta ID
IE D
RSV
M a in D ata 16 0 bytes (D 0 to D 1 5 9 ) M a in D ata 17 2 bytes (D
160
to D ) 331
M a in D a ta 1 7 2 b ytes (D to D ) 332 503 12 ro w s
M a in D ata 17 2 bytes (D M a in D ata 16 8 bytes (D
to D
1708
1880
to D
1879
2047
) ED C
)
4 b y tes 97-0151-A
Figure 9 - Data Frame 13.1.1
Data ID This field shall consist of four bytes, the bits of which are numbered consecutively from b0 (lsb) to b31 (msb), see figures 10 and 11.
b24 b23
b31
b0
Data Field Information
Data Field Number
Figure 10 - Data ID b31
b30
b29
b28
Sector Format type
Tracking method
Reflectivity
Reserved
b27
b26
Zone type
b25
b24
Data type
Layer number
Figure 11 - Data Field Information The bits of the Data Field Information field shall be set as follows. Bit b31
shall be set to ONE, indicating Zoned format type
Bit b30
shall be set to ZERO in the Embossed Area, indicating pit tracking (see 16.1) ONE in the Rewritable Area, indicating groove tracking (see 16.1)
Bit b29
shall be set to ONE, indicating that the reflectivity does not exceed 40 %
Bit b28
shall be set to ZERO
- 16 -
Bits b27 and b26
shall be set to ZERO ZERO in the Data Zone ZERO ONE in the Lead-in Zone ONE ZERO in the Lead-out Zone
Bit b25
shall be set to ZERO in the Embossed Area. ONE in the Rewritable Area
Bit b24
shall be set to ZERO, indicating that through an entrance surface only one recording layer can be accessed.
Bits b23 to b0
shall be set to − to the sector number in the Embossed Area (see 16.1), in the DMAs.(see 17.1)and in the Reserved Zones of the Lead-in Zone (see 16.2) and of the Lead-out Zone (see 16.4), − to the values specified in 17.8.4 in the Data Zone (see 16.3),
Other settings are prohibited by this ECMA Standard, see also annex L. 13.1.2
Data ID Error Detection code (IED) When identifying all bytes of the array shown in figure 9 as Ci,j for i = 0 to 11 and j = 0 to171, the bytes of IED are represented by C0,j for j = 4 to 5. Their setting is obtained as follows. 5
IED(x) =
∑ C x 0,j
j=4
5-j
=
I(x) x2 mod GE(x)
where 3 I(x) =∑ C0,j x3-j j=0 1 GE(x) = Π ( x + αk ) k=0
α is the primitive root of the primitive polynomial P(x) = x8 + x4 + x3 + x2 + 1 13.1.3
Reserved bytes All the bytes of this 6-byte field shall be set to (00).
13.1.4
Error Detection Code (EDC) This 4-byte field shall contain an Error Detection Code computed over the preceding 2 060 bytes of the Data Frame. Considering the Data Frame as a single bit field starting with the most significant bit of the first byte of the ID field and ending with the least significant bit of the EDC field, then this msb will be b16 511 and the lsb will be b0. Each bit bi of the EDC is as follows for i = 31 to 0 : 0 EDC(x) = ∑ bi xi i=31
=
where 32 I(x) = ∑ bi xi i=16 511 G(x) = x32 + x31 + x4 + 1
I(x) mod G(x)
- 17 -
13.2
Scrambled Frames The 2 048 Main Data bytes shall be scrambled by means of the circuit shown in figure 12 which shall consist of a feedback bit shift register in which bits r7 (msb) to r0 (lsb) represent a scrambling byte at each 8-bit shift. At the beginning of the scrambling procedure of a Data Frame, positions r14 to r0 shall be pre-set to the value(s) specified in table 3. The same pre-set value shall be used for 16 consecutive Data Frames. After 16 groups of 16 Data Frames, the sequence is repeated. The initial pre-set number is equal to the value represented by bits b7 (msb) to bit b4 (lsb) of the Data ID field of the Data Frame. Table 1 specifies the initial pre-set value of the shift register corresponding to the 16 initial pre-set numbers. Table 1 - Initial values of the shift register Initial pre-set number
Initial pre-set value
Initial pre-set number
Initial pre-set value
(0)
(0001)
(8)
(0010)
(1)
(5500)
(9)
(5000)
(2)
(0002)
(A)
(0020)
(3)
(2A00)
(B)
(2001)
(4)
(0004)
(C)
(0040)
(5)
(5400)
(D)
(4002)
(6)
(0008)
(E)
(0080)
(7)
(2800)
(F)
(0005)
+
r
1 4
r
1 3
r
1 2
r
1 1
r
1 0
r
9
r
8
r
7
r
6
r
5
r
4
r
3
r
2
r
1
r
0
97-0021-A
Figure 12 - Feedback shift register The part of the initial value of r7 to r0 is taken out as scrambling byte S0. After that, 8-bit shift is repeated 2 047 times and the following 2 047 bytes shall be taken from r7 to r0 as scrambling bytes S1 to S2 047. The Main Data bytes Dk of the Data Frame become scrambled bytes D’k where D’k = Dk ⊕ Sk
for k = 0 to 2 047
⊕ stands for Exclusive OR
13.3
ECC Blocks An ECC Block is formed by arranging 16 consecutive Scrambled Frames in an array of 192 rows of 172 bytes each (see figure 13). To each of the 172 columns, 16 bytes of Parity of Outer Code are added, then, to each of the resulting 208 rows, 10 byte of Parity of Inner Code are added. Thus a complete ECC Block comprises 208 rows of 182 bytes each. The bytes of this array are identified as Bi,j as follows, where i is the row number and j the column number. Bi,j for i = 0 to 191 and j = 0 to 171 are bytes from the Scrambled Frames Bi,j for i = 192 to 207 and j = 0 to 171 are bytes of the Parity of Outer Code Bi,j for i = 0 to 207 and j = 172 to 181 are bytes of the Parity of Inner Code
- 18 -
PI 1 0 b y te s
1 7 2 b y te s
B 0 ,1 71
B 0 ,1 72
B 0 ,1 81
B 1 ,1
B 0 ,1 70 B 1 ,1 70
B 1 ,1 71
B 1 ,1 72
B 1 ,1 81
B 2 ,0
B 2 ,1
B 2 ,1 70
B 2 ,1 71
B 2 ,1 72
B 2 ,1 81
B 1 89 ,0
B 1 89 ,1 7 0
B 1 89 ,1 8 1
B 1 91 ,1 7 0
B 1 89 ,1 7 1 B 1 90 ,1 7 1 B 1 91 ,1 7 1
B 1 89 ,1 7 2
B 1 90 ,0 B 1 91 ,0
B 1 89 ,1 B1 90 ,1 B 1 91 ,1
B 1 90 ,1 7 2 B 1 91 ,1 7 2
B 1 90 ,1 8 1 B 1 91 ,1 8 1
B1 92 ,0
B 1 92 ,1
B 1 92 ,1 7 0
B 1 92 ,1 7 1
B 1 92 ,1 7 2
B 1 92 ,1 8 1
B 2 07 ,0
B 2 07 ,1
B 2 07 ,1 7 0
B 2 07 ,1 7 1
B 2 07 ,1 7 2
B 2 07 ,1 8 1
B 0 ,0
B 0 ,1
B 1 ,0
192 ro w s
B 1 90 ,1 7 0
PO 1 6 row s
97-0022-A
Figure 13 - ECC Block configuration The PO and PI bytes shall be obtained as follows. In each of columns j = 0 to 171, the 16 PO bytes are defined by the remainder polynomial Rj(x) to form the outer code RS (208,192,17). 207 Rj(x) =
∑ Bi,j x207-i =
Ij(x) x16
mod GPO(x)
i=192 where 191 Ij(x) =
∑ Bi,j x191-i i=0 15
GPO(x) = Π (x + αk ) k=0 In each of rows i = 0 to 207, the 10 PI bytes are defined by the remainder polynomial Ri(x) to form the inner code RS (182,172,11). 181 Ri(x) =
∑ Bi,j x181-j = j=172
Ii(x) x10
mod GPI(x)
- 19 -
where 171 Ii(x) =
∑ Bi,j x171-j j=0 9
GPI(x) = Π (x + αk ) k=0 α is the primitive root of the primitive polynomial P(x) = x8 + x4 + x3 + x2 + 1
13.4
Recording Frames Sixteen Recording Frames shall be obtained by interleaving one of the 16 PO rows at a time after every 12 rows of an ECC Block (figure 13). This is achieved by re-locating the bytes Bi,j of the ECC Block as Bm,n for and n = j
for i ≤ 191
m = 13 (i - 191) - 1 and n = j
for i ≥ 192
m = i + int[i / 12]
where int[x] represents the largest integer not greater than x. Thus the 37 856 bytes of an ECC Block are re-arranged into 16 Recording Frames of 2 366 bytes. Each Recording Frame consists of an array of 13 rows of 182 bytes (see figure 14).
- 20 -
182 bytes
B 0,0
B 0,171
B 0,172
B 0,181
Recording Frame No. 0
13 rows B11,0
B 11,171
B11,172
B11,181
B 192,0
B192,171
B192,172
B192,181
B12,0
B 12,171
B12,172
B 12,181
Recording Frame No. 1
13 rows B 23,0
B 23,171
B 23,172
B 23,181
B 193,0
B 193,171
B 193,172
B 193,181
B180,0
B180,171
B 180,172
B180,181
Recording Frame No. 15
13 rows B191,0
B 191,171
B 191,172
B191,181
B 207,0
B 207,171
B 207,172
B 207,181
97-0023-A
Figure 14 - Recording Frames obtained from an ECC Block
13.5
Recording code and NRZI conversion The 8-bit bytes of each Recording Frame shall be transformed into 16-bit Code Words with the run length limitation that between 2 ONEs there shall be at least 2 ZEROs and at most 10 ZEROs (RLL 2,10). Annex G specifies the conversion tables to be applied. The Main Conversion table and the Substitution table specify a 16-bit Code Word for each 8-bit bytes with one of 4 States. For each 8-bit byte, the tables indicate the corresponding Code Word, as well as the State for the next 8-bit byte to be encoded. The 16-bit Code Words shall be NRZI-converted into Channel bits before recording on the disk. (figure 15).
- 21 -
1 6 -bit C o de W o rd s
1 6 C h an n el b its N R Z I co n v erted p u lses
NRZ co n v e rsio n
E x c lu siv e-O R
T T = 1 c ha n n el c lo ck p eriod 97-0024-A
Figure 15 - NRZI conversion
13.6
Recorded Data Field The structure of a Recorded Data Field is shown in figure 16. It shall consist of 13 rows, each comprising two Sync Frames. A Sync Frame shall consist of a SYNC Code from table 2 and 1 456 Channel bits representing the first, respectively the second 91 8-bit bytes of a row of a Recording Frame. The first row of the Recording Frame is represented by the first row of the Recorded Data Field, the second by the second, and so on. 32
13 ro w s
1456
32
SY 0
SY 5
SY 1
SY 5
SY 2
SY 5
SY 3
SY 5
SY 4
SY 5
SY 1
SY 6
SY 2
SY 6
SY 3
SY 6
SY 4
SY 6
SY 1
SY 7
SY 2
SY 7
SY 3
SY 7
SY 4
SY 7 S y n c F ram e
1456
S y n c F ram e
97 -00 25-A
Figure 16 - Recorded Data Field Recording shall start with the first Sync Frame of the first row, followed by the second Sync Frame of that row, and so on row-by-row. For the selection of the Primary and Secondary SYNC Codes, see 13.7.
- 22 -
Table 2 - SYNC Codes State 1 and State 2 Primary SYNC codes Secondary SYNC codes (msb) (lsb) (msb) (lsb) SY0 = 0001001001000100 0000000000010001 / 0001001000000100 0000000000010001 SY1 = 0000010000000100 0000000000010001 / 0000010001000100 0000000000010001 SY2 = 0001000000000100 0000000000010001 / 0001000001000100 0000000000010001 SY3 = 0000100000000100 0000000000010001 / 0000100001000100 0000000000010001 SY4 = 0010000000000100 0000000000010001 / 0010000001000100 0000000000010001 SY5 = 0010001001000100 0000000000010001 / 0010001000000100 0000000000010001 SY6 = 0010010010000100 0000000000010001 / 0010000010000100 0000000000010001 SY7 = 0010010001000100 0000000000010001 / 0010010000000100 0000000000010001 State 3 and State 4 Primary SYNC codes Secondary SYNC codes (msb) (lsb) (msb) (lsb) SY0 = 1001001000000100 0000000000010001 / 1001001001000100 0000000000010001 SY1 = 1000010001000100 0000000000010001 / 1000010000000100 0000000000010001 SY2 = 1001000001000100 0000000000010001 / 1001000000000100 0000000000010001 SY3 = 1000001001000100 0000000000010001 / 1000001000000100 0000000000010001 SY4 = 1000100001000100 0000000000010001 / 1000100000000100 0000000000010001 SY5 = 1000100100000100 0000000000010001 / 1000000100000100 0000000000010001 SY6 = 1001000010000100 0000000000010001 / 1000000001000100 0000000000010001 SY7 = 1000100010000100 0000000000010001 / 1000000010000100 0000000000010001
13.7 13.7.1
DC component suppress Control (DCC) DCC for the data in the Rewritable Area The DC component suppress Control (DCC) minimizes the absolute value of the accumulated DSV (Digital Sum Value, see 4.3) . The DCC algorithm controls the choice of SYNC codes and 16-Channel bit Code Words in each of following three cases so that DSV is minimized. The choice shall be determined so that, for each 16-bit Code Word (or SYNC Code), the accumulated DSV is a minimum at the end of the 16-bit Code Word (or SYNC Code) to be selected. a) Choice of the SYNC Codes between Primary or Secondary SYNC Codes. b) For the 8-bit bytes in the range 0 to 87, the Substitution table offers an alternative 16-bit Code Word for all States. c) For the 8-bit bytes in the range 88 to 255, when the prescribed State is 1 or 4, then the 16-bit Code Word can be chosen either from State 1 or from State 4, so as to ensure that the RLL requirement is met.
13.7.2
DCC for the data in the Embossed Area The DC component suppress control (DCC) minimizes the absolute value of the accumulated DSV. To ensure a reliable radial tracking and a reliable detection of the HF signals, the low frequency content of the stream of Channel bit patterns should be kept as low as possible. In order to achieve this, the Digital Sum Value shall be kept as low as possible. At the beginning of recording, the DSV shall be set to 0. The different ways of diminishing the current value of the DSV are as follows. a) Choice of SYNC Codes between Primary or Secondary SYNC Codes
- 23 -
b) For the 8-bit bytes in the range 0 to 87, the Substitution table offers an alternative 16-bit Code Word for all States c) For the 8-bit bytes in the range 88 to 255, when the prescribed State is 1 or 4, then the 16-bit Code Word can be chosen either from State 1 or from State 4, so as to ensure that the RLL requirement is met. In order to use these possibilities, two data streams, Stream 1 and Stream 2, are generated for each Sync Frame. Stream 1 shall start with the Primary SYNC Code and Stream 2 with the Secondary SYNC Code of the same category of SYNC Codes. As both streams are modulated individually, they generate a different DSV because of the difference between the bit patterns of the Primary and Secondary SYNC Codes. In the cases b) and c), there are two possibilities to represent a 8-bit byte. The DSV of each stream is computed up to the 8-bit byte preceding the 8-bit byte for which there is this choice. The stream with the lowest DSV is selected and duplicated to the other stream. Then, one of the representations of the next 8-bit byte is entered into Stream 1 and the other into Stream 2. This operation is repeated each time case b) or c) occurs. Whilst case b) always occurs at the same pattern position in both streams, case c) may occur in one of the streams and not in the other because, for instance, the next State prescribed by the previous 8-bit byte can be 2 or 3 instead of 1 or 4. In that case the following 3-step procedure shall be applied. 1) Compare the DSVs of both streams. 2) If the DSV of the stream in which case c) occurs is smaller than that of the other stream, then the stream in which case c) has occurred is chosen and duplicated to the other stream. One of the representations of the next 8-bit byte is entered into this stream and the other into the other stream. 3) If the DSV of the stream in which case c) has occurred is larger than that of the other stream, then case c) is ignored and the 8-bit byte is represented according to the prescribed State. In both cases b) and c), if the DSVs are equal, the decision to choose Stream 1 or Stream 2 is implementationdefined. The procedure for case a) shall be as follows. At the end of a Sync Frame, whether or not case b) and or case c) have occurred, the DSV of the whole Sync Frame is computed and the stream with the lower DSV is selected. If this DSV is greater than + 63 or smaller than -64, then the SYNC Code at the beginning of the Sync Frame is changed from Primary to Secondary or vice versa. If this yields a smaller DSV, the change is permanent, if the DSV is not smaller, the original SYNC Code is retained. During the DSV computation, the actual values of the DSV may vary between -1000 and +1000, thus it is recommended that the count range for the DSV be at least from -1 024 to +1 023. 13.7.3
PID and PED recording PID and PED (see 15.4 and 15.5) shall be recorded in the same manner as specified for Data Fields in 13.5, or in a simplified manner using only the Main Conversion Table G.1. In the first case, the value of the accumulated DSV shall be reset to 0 at the beginning of VFO 1 in the Header 1 field. In both cases recording of PID 1, PID 2, PID 3 and PID 4 shall start with the State 1.
14 14.1
Track format Track shape Each track shall form a 360º turn of a continuous spiral. In the Embossed Area (see 16.1) of the Information Zone, tracks shall be formed by a series of embossed pits. In the Rewritable Area (see 16.1) of the Information Zone, tracks shall be formed by a land and groove pattern. Recording is made on the land between the grooves as well as in the grooves themselves. A track in the grooves is called a groove track. A track on the land between the grooves is called a land track. The end of a groove track is followed by the beginning of a land track, and vice versa. A sector in a groove track is called a groove sector, a sector in a land track is called a land sector.
- 24 -
All tracks are continuous in the Information Zone. However, the grooves shall be interrupted in the Header and Mirror fields of each sector (see 15.1.1). The grooves shall be wobbled in the radial direction in such way that they are given a sinusoidal wave form. The detailed shape of the tracks is determined by the requirements of Section 4.
14.2
Track path The track path shall be a continuous spiral from the inside (beginning of the Lead-in Zone) to the outside (end of the Lead-out Zone) of the disk.
14.3
Track pitch The track pitch is the distance between the centrelines of adjacent tracks, measured in a radial direction. It shall be 0,74 µm ± 0,03 µm. The track pitch averaged over the Data Zone shall be 0,74 µm ± 0,01 µm. The tracks shall start in the Lead-in Zone at radius +0,0 mm
22,6 mm -0,2 mm
14.4
Track layout Each track shall be divided into sectors. The number of sectors per track in the Embossed Area of the Lead-in Zone shall be 18 (see table 3). Each sector in the Embossed Area of the Lead-in Zone shall comprise 2 418 bytes where each byte is represented on the disk by 16 Channel bits. The sectors in the Embossed Area of the Lead-in Zone shall be equally spaced over a track. They shall have a size of 38 688 Channel bits. The number of sectors per track in the Rewritable Area shall increase from Zone 0 to Zone 23 when moving from the inner radius to the outer radius so as to keep the recording linear density practically constant in any Zone. Each sector shall comprise 2 697 bytes where each byte is represented on the disk by 16 Channel bits. The sectors in the Rewritable Area shall be equally spaced over a track. They shall have a size of 43 152 Channel bits.
14.5
Rotation speed The nominal rotation speed is different in each Zone and is determined by the Zone number. These values are for reference only. The nominal rotation speed yielding a user data bit rate of 11,08 Mbit/s is obtained by using the formula Rotation speed (Hz) = 11 080 000 / (Number of sectors per track × 2 048 × 8). The disk shall rotate counterclockwise as viewed from the optical head.
- 25 -
Table 3 - Nominal rotation speed Rotation speed (Hz)
Period of a Channel bit (ns)
Period of a Byte
Period of a Sector
(ns)
(µs)
Lead-in Zone (Embossed Area)
37,57
18
38,22
612
1 479
Lead-in Zone (Rewritable Area)
39,78
17
34,27
548
1 479
Zone 0
39,78
17
34,27
548
1 479
Zone 1
37,57
18
34,27
548
1 479
Zone 2
35,59
19
34,27
548
1 479
Zone 3
33,81
20
34,27
548
1 479
Zone 4
32,20
21
34,27
548
1 479
Zone 5
30,74
22
34,27
548
1 479
Zone 6
29,40
23
34,27
548
1 479
Zone 7
28,18
24
34,27
548
1 479
Zone 8
27,05
25
34,27
548
1 479
Zone 9
26,01
26
34,27
548
1 479
Zone 10
25,05
27
34,27
548
1 479
Zone 11
24,15
28
34,27
548
1 479
(Rewritable Aera) Zone 12
23,32
29
34,27
548
1 479
Zone 13
22,54
30
34,27
548
1 479
Zone 14
21,82
31
34,27
548
1 479
Zone 15
21,13
32
34,27
548
1 479
Zone 16
20,49
33
34,27
548
1 479
Zone 17
19,89
34
34,27
548
1 479
Zone 18
19,32
35
34,27
548
1 479
Zone 19
18,79
36
34,27
548
1 479
Zone 20
18,28
37
34,27
548
1 479
Zone 21
17,80
38
34,27
548
1 479
Zone 22
17,34
39
34,27
548
1 479
Zone 23
16,91
40
34,27
548
1 479
16,91
40
34,27
548
1 479
Data Zone
Lead-out Zone (Rewritable Area)
14.6
Number of sectors per track
Radial alignment In the Lead-in Zone, the Data Zone and the Lead-out Zone, the sectors on adjacent tracks shall be radially aligned so that the angular distance between the first Channel bits of two sectors does not exceed 4 Channel bits, except for the sectors on the track along the boundary between Buffer Zone 2 and the Connection Zone (see 16.2.7), along the boundary between Guard Track Zone 1 and the Connection Zone, and along the 23 boundaries between the 24 Zones of the Data Zone. In addition, the angular distance between the first Channel bits of any pair of non-adjacent tracks shall not exceed 256 Channel bits.
14.7
Sector number Each sector shall be identified by a sector number.
- 26 -
Sector (30000) shall be the first sector of the Rewritable Area in the Lead-in Zone. It shall be located at a radius of +0,0 mm
24,0 mm -0,2 mm
The sector numbers of the following sectors shall be increased by 1 for each sector. Sector (30000) shall be the first sector in a groove track.
15
Sector format
15.1 15.1.1
Sector layout Sector layout in the Rewritable Area A sector shall consist of 20 fields within a Header field, a Mirror field and 8 fields within a Recording field. The 4 PID fields, the 4 PED fields and the Data field contain data. Each byte of these fields shall be recorded as a 16Channel bit pattern according to 13.5 and annex G. All other fields are defined in terms of Channel bits. The numbers below the identifier of each field in figure 17 indicate the number of 16-Channel bit patterns in each field. The Recording field may be either unrecorded or recorded with up to 2 048 user bytes. The Header field shall be embossed. The nominal length of a sector shall be 43 152 Channel bits. The length of the Header field shall be 2 048 Channel bits and the length of the Mirror field shall be 32 Channel bits. The nominal length of the Recording field shall be 41 072 Channel bits. It shall consist of a Gap field, a Guard 1 field, a VFO 3 field, a PS field, a Data field, a PA 3 field, a Guard 2 field and a Buffer field. The Header field shall consist of a Header 1 field, a Header 2 field, a Header 3 field and a Header 4 field. The Header 1 field shall consist of a VFO 1, an Address Mark, a Physical ID 1, a PED 1 and a PA 1. The Header 2 field shall consist of a VFO 2, an Address Mark, a Physical ID 2, a PED 2 and a PA 2. The Header 3 field shall consist of a VFO 1, an Address Mark, a Physical ID 3, a PED 3 and a PA 1. The Header 4 field shall consist of a VFO 2, an Address Mark, a Physical ID 4, a PED 4 and a PA 2. The Header field shall consist of Complementary Allocated Pit Addresses. The Header 1 field and the Header 2 field shall be arranged on the boundary between the groove track and the outer adjacent land track. The Header 3 field and the Header 4 field shall be arranged on the boundary between the groove track and the inner adjacent land track. A groove shall be 41 072 Channel bits in length from the beginning of the Gap field. The groove is wobbled, and one wobble cycle shall be 186 Channel bits in length. This wobbled groove shall be sinusoidal, and shall start with 0 degree of phase at the beginning of the Gap field in each sector. The first half cycle shall be wobbled in the outer radial direction. The groove shall end from 0 to 4 Channel bits before the following Header field. The Mirror field shall be located between the Header 4 and the Gap field. The layout of a sector in the Rewritable Area is shown in figure 17. The layout of the Header field on a disk from the view of objective lens shall be as shown in figure 18.
15.1.2
Sector layout in the Embossed Area A sector shall consist of the Data field formed by continuous embossed pits with a size of 38 688 Channel bits.. A sector on the track has no gap and is placed continuously from the beginning of the Embossed Area in the Lead-in Zone to the end of the Embossed Area in the Lead-in Zone.
- 27 -
Recording field Header
Mirror
128
2
Gap 10 +
J 16
Guard 1
VFO 3
PS
Data
PA 3
Guard 2
Buffer
20 + K
35
3
2 418
1
55 - K
25 −
0 ≤ J ≤ 15
J 16
0≤K≤7 Sector layout
Header 1 VFO 1
AM
36
3
Header 2
PID 1 PED 1 PA 1 VFO 2
4
2
1
8
AM
3
Header 3
PID 2 PED 2 PA 2 VFO 1
4
2
1
AM
36
3
Header 4
PID 3 PED 3 PA 1 VFO 2
4
2
1
8
AM
PID 4 PED 4 PA 2
3
4
2
1
Header field layout Figure 17 - Layout of sector in the Rewritable Area
(a) L ay ou t of th e H ead e r fie ld of the first secto r o f a tra ck
O u ter
T ra ck p itch
1 8 6 C h an n e l b its
G ro o v e M irro r field S ecto r (m + 3 N -1 ) H e ad er 1 field H e ad er 2 field (m + 3 N ) (m + 3 N ) L an d H e ad er 3 field H e ad er 4 field S ecto r (m + 2 N -1 ) (m + 2 N ) (m + 2 N ) G ro o v e T ra ck p itch/2 S ecto r (m + N -1 ) H e ad er 1 field H e ad er 2 field (m + N ) (m + N ) L an d S ecto r (m -1 ) H e ad er 3 field H e ad er 4 field T ra ck p itch/2 (m ) (m )
T ra ck p itch
L an d S ecto r (m + 3 N ) G ro o v e S ecto r (m + 2 N ) L an d S ecto r (m + N ) G ro o v e S ecto r (m )
B eg in n in g o f th e S ec to r In n e r
N : N u m ber o f secto rs pe r trac k
(b ) L ay ou t o f H eade r fie ld ex cep t fo r the first se ctor in a tra ck
1 8 6 C h an n e l b its
O u ter H e ad er 1 field H e ad er 2 field (n + 3 N ) (n + 3 N )
M irro r field
G ro o v e G ro o v e S ecto r (n + 2 N ) S ecto r (n + 2 N -1 ) H e ad er 3 field H e ad er 4 field (n + 2 N ) (n + 2 N ) L an d L an d S ecto r (n + N -1 ) H e ad er 1 field H e ad er 2 field T ra ck p itch/2 S ecto r (n + N ) (n + N ) (n +N ) G ro o v e G ro o v e T ra ck p itch S ecto r (n -1 ) H e ad er 3 field H e ad er 4 field S ecto r n T ra ck p itch/2 n n T ra ck p itch
In n e r B eg in n in g o f th e S ec to r
N : N u m b e r o f sec to rs p e r tra ck
97 -01 44-A
Figure 18 - Layout of Header field in the Rewritable Area
15.2
VFO fields There shall be two embossed VFO 1 fields and two embossed VFO 2 fields in the Header field and one VFO 3 field in the Recording field to give bit synchronization to the variable frequency oscillator of the phase-locked loop of the
- 28 -
Read Channel. VFO 1 shall have a length of 576 Channel bits. VFO 2 shall have a length of 128 Channel bits. VFO 3 shall have a length of 560 Channel bits. The continuous Channel bit pattern for the VFO fields shall be as shown in figure 19.
V F O 1 , 57 6 C h a nn e l b its 000 10001000 10001 . . . . 000 10001
sp a ce m a rk
V F O 2 , 12 8 C h a nn e l b its 00010001000 1000 1 . . . . 00010001
sp a ce m a rk
V F O 3 , 56 0 C h a nn e l b its: 1 0 0 01 0 0 0 1 00 0 1 0 0 0 ......1 0 0 01 0 0 0 97-0145-A
Figure 19 - VFO patterns
15.3
Address Mark (AM) The Address Mark shall consist of an embossed pattern that does not occur in the 8-to16 recording code. The field is intended to give the drive byte synchronization for the following PID field. It shall have a length of 48 Channel bits with the following pattern as shown in figure 20.
0 0 0 10 0 0 1 0 00 0 0 0 0 00 0 0 0 0 10 0 0 1 0 00 1 0 0 0 00 0 0 0 0 0 00 0 1 0 0 01
sp a ce m a rk
97-0146-A
Figure 20 - Address Mark pattern
15.4
Physical ID (PID) fields This field shall consist of four bytes the bits of which are numbered consecutively from b0 (lsb) to b31 (msb), see figure 21. b31
b30 b29
Reserved
b28 b27 Physical ID Number
b26
b25
Sector Type
b24
b23
Layer Number
Figure 21 - Physical ID field The bits of the most significant byte, the Sector Information, shall be set as follows. Bits b31 to b30
shall be set to ZERO ZERO
Bits b29 to b28
shall be set to ZERO ZERO, ZERO ONE,
indicating PID 1 indicating PID 2
ONE ZERO, ONE ONE,
indicating PID 3 indicating PID 4
b0 Sector Number
- 29 -
Bit b27 to b25
shall be set to 100 101 110 111
Bit b24
in the first rewritable sector in a track in the last rewritable sector in a track in the last but one rewritable sector in a track in other rewritable sectors in a track
shall be set to ZERO, indicating Layer 0
The least significant three bytes, bits b0 to b23, shall specify the sector number in binary notation. In the Rewritable Area, the PID 1 and the PID 2 fields both specify the sector number of the following land sector, the PID 3 and the PID 4 fields both specify the sector number of the following groove sector.
15.5
PID Error Detection code (PED) fields Each PID field and the following PED field constitute a matrix the bytes of which are identified by Cj = 0 to 5. The bytes of the IEC are C4 and C5. 5
PED(x) =
∑ Cj x = I(x) x mod G (x) 5-j
2
E
j= 4
where, 3
I(x) =
∑ Cj x
3-j
j= 0
1
GE(x) =
(x + α ) ∏ k=0 k
α is the primitive root of the primitive polynomial P(x) = x8 + x4 + x3 + x2 + 1
15.6
Postamble 1 and Postamble 2 (PA 1, PA 2) fields The Postamble 1 and Postamble 2 fields shall have a length of 16 Channel bits. The PA 1 field and PA 2 field allow for the closure of the last byte of the preceding PED, figures 22 to 25.
sp a ce
0
0
0
0
0
1
0
0
0
0
0
1
0
0 0 1
m a rk
T h e p rec ed in g b y te e nd s w ith a m ark
sp a ce
0
0
0
1
0
0
0
1
0
0
0
1
0
0 0
m a rk T h e p rec ed in g b y te e nd s w ith a spa ce 97-0147-A
Figure 22 - PA 1 patterns in State 1 and State 2
1
- 30 -
1 0 0 0 1 0 0
S p a ce
1 0 0
0
1 0
0 0 1
m a rk T h e p rec ed in g b y te e nd s w ith a m ark
1 0 0 0 0
sp a ce
1 0 0 0 0 0
1 0
0 0 1
m a rk T h e p rec ed in g b y te e nd s w ith a spa ce 97-0148-A
Figure 23 - PA 1 patterns in State 3 and State 4
0
0 1
0
0
1
0
0
1
0
0
0 0
0
0
0
0
0
0
0
0
sp a ce m a rk T h e p rec ed in g b y te e nd s w ith a m ark
sp a ce
0 0 0
0
0
1
0
0
1
0
0
0 0
m a rk T h e p rec ed in g b y te e nd s w ith a sp a ce 97-0149-A
Figure 24 - PA 2 patterns in State 1 and State 2
1 0
0
0 0
1
0
0
1
0
0
0
0
0
sp a ce m a rk T h e p rec ed in g b y te e nd s w ith a m ark
1
0
0
0
0
0
0
0
1
0
0
0 0
0
sp a ce m a rk T h e p rec ed in g b y te e nd s w ith a spa ce 97-0150-A
Figure 25 - PA 2 patterns in State 3 and State 4
0
0
- 31 -
15.7
Mirror field This field shall have a nominal length of 32 Channel bits. This field shall have neither grooves nor embossed marks. There shall be no writing in this field.
15.8
Gap field The Gap field shall have a nominal length of (160 + J) Channel bits, where J shall be varied randomly from 0 to 15. The tolerance on the resulting nominal length shall be ± 20 Channel bits. The variation of the length of the Gap field shall be compensated by the length of the Buffer field. See annex J. Its contents are not specified and shall be ignored on interchange, but shall not be embossed. It is the first field of the Recording field, and gives a drive time for processing after it has finished reading the Header field and before it has to write the Guard 1 field or read the VFO 3 field.
15.9
Guard 1 field The Guard 1 field shall have a nominal length of (20 + K) bytes, where K shall be varied randomly from 0 to 7 bytes to shift the position of the marks formed in the fields following from the VFO 3 field to the Guard 2 field of the Recording field. See annex J. The first 20 bytes of the Guard 1 field protect the beginning of the VFO 3 field from signal degradation after overwriting many times. Their contents shall be ignored on reading. The Guard 1 field shall contain (20 + K) times the 16 Channel bit pattern 1000 1000 1000 1000
15.10
Pre-Synchronous code (PS) field The PS field is intended to allow the drive to achieve byte synchronization for the following Data field. It shall contain the 48-Channel bit pattern 0000 0100 0100 1000 0010 0001 0010 0000 1000 0010 0001 0000
15.11
Data field This field shall be recorded with the format specified in clause 13.
15.12
Postamble 3 (PA 3) field The PA 3 field shall be equal in length to 16 Channel bits. The PA 3 field allows closure of the last byte of the preceding Data field as required by the 8-to-16 recording code. For State 1 and State 2, it shall be set to 0001 0010 0100 0100 / 0001 0010 0000 0100 State 3 and State 4, it shall be set to 1001 0010 0000 0100 / 1001 0010 0100 0100 In demodulating, PA 3 can be used as the first 16 Channel bits of SY0 in the next Data field.
15.13
Guard 2 field The Guard 2 field shall have a nominal length of (55-K) bytes, where K shall be varied from 0 to 7 so that the total length of Guard 1 field and Guard 2 field shall be equal to 75 bytes. The last 20 bytes of the Guard 2 field protect the end of the Data field from degradation after overwriting many times. The rest of the Guard 2 field takes up the variation of actual length of the written data. Its contents shall be ignored in interchange. The Guard 2 field shall be set to (55-K) times the 16-Channel bit pattern 1000 1000 1000 1000 The fields of the Guard 1 field, the VFO3 field, the PS field, the Data field, the PA 3 field and the Guard 2 field shall be written without a gap and their total length shall be 2 532 bytes. See annex J.
15.14
Recording polarity randomization In the Rewritable Area, the polarity of NRZI-converted pulses shall be alternated randomly at each recording in order to homogenize the average probability of location of the marks and spaces on the recording layer after a
- 32 -
number of overwriting cycles. The alternation shall be applied to all pulses in the Guard 1 field, the VFO3 field, the PS field, the Data field, the PA 3 field and the Guard 2 field, at the same time. The random selection shall be carried out in such a way that the polarity, length of the Gap field and length of the Guard 2 field shall have no relation with each other. See annex J. The polarity shall be ignored on interchange.
15.15
Buffer field The Buffer field shall have a nominal length of (400 - J) Channel bits, where the J shall equal the number J selected in 15.8. The tolerance on the resulting nominal value shall be ± 272 Channel bits. The content of this field is not specified by this ECMA Standard, and shall be ignored in interchange. The Buffer field is needed for the actual length of the written data, as determined by the runout of the track and the speed variations of the disk during writing of the data.
16 16.1
Format of the Information Zone Division of the Information Zone The Information Zone shall comprise three parts: the Lead-in Zone, the Data Zone and the Lead-out Zone. It shall contain all information on the disk relevant for data interchange. This information shall consist of tracking provisions, Header fields, data and user-recorded data. In the first five zones of the Lead-in Zone (see 16.2) this information is embossed. These five zones constitute the Embossed Area. The last six zones of the Lead-in Zone, the Data Zone and the Lead-out Zone constitute the Rewritable Area in which the information is recorded in rewritable mode. The Information Zone shall be sub-divided as follows. − Lead-in Zone − − − − − − − − −
Initial Zone Buffer Zones Reference Code Zone Control Data Zone Connection Zone Guard Track Zones Test Zones Reserved Zone Defect Management Areas (DMA 1 and DMA 2)
− Data Zone − Lead-out Zone − − − −
Defect Management Areas (DMA 3 and DMA 4) Reserved Zone Guard Track Zones Test Zones
The division of the Information Zone shall be as shown in table 4. The radii of a Zone in the table are the nominal values of the radius of the centre of the first track and of the radius of the centre of the last track of the Zone. The tolerance on these nominal values shall be +0,0 mm and -0,2 mm.
- 33 -
Table 4 - Layout of the Information Zone Nominal radius (mm) (Embossed Area) Lead- in Zone (Rewritable Area)
Initial Zone Reference Code Zone Buffer Zone 1 Control Data Zone Buffer Zone 2
22,6 to 24,0
Number of sectors per track 18
Number of tracks
Sector numbers
1 896
(027AB0) to (02EFFF) (02F000) to (02F00F) (02F010) to (02F1FF) (02F200) to (02FDFF) (02FE00) to (02FFFF)
1 888
(030000) to (0301FF) (030200) to (0305FF) (030600) to (030CFF) (030D00) to (030EFF) (030F00) to (030F7F) (030F80) to (030FFF) (031000) to (037D5F)
Connection Zone Guard Track Zone 1 Disk Test Zone Drive Test Zone Guard Track Zone 2 Reserved Zone DMA 1 & DMA 2 Zone 0
24,0 to 24,2
17
24,2 to 25,4
17
Zone 1
25,4 to 26,8
18
1 888
(037D60) to (04021F)
Zone 2
26,8 to 28,2
19
1 888
(040220) to (048E3F)
Zone 3
28,2 to 29,6
20
1 888
(048E40) to (0521BF)
Zone 4
29,6 to 31,0
21
1 888
(0521C0) to (05BC9F)
Zone 5
31,0 to 32,4
22
1 888
(05BCA0) to (065EDF)
Zone 6
32,4 to 33,8
23
1 888
(065EE0) to (07087F)
Zone 7
33,8 to 35,2
24
1 888
(070880) to (07B97F)
Zone 8
35,2 to 36,6
25
1 888
(07B980) to (0871DF)
Zone 9
36,6 to 38,0
26
1 888
(0871E0) to (09319F)
Data Zone
Zone 10
38,0 to 39,4
27
1 888
(0931A0) to (09F8BF)
(Rewritable Area)
Zone 11
39,4 to 40,8
28
1 888
(09F8C0) to (0AC73F)
Lead-out Zone (Rewritable Area)
Zone 12
40,8 to 42,2
29
1 888
(0AC740) to (0B9D1F)
Zone 13
42,2 to 43,6
30
1 888
(0B9D20) to (0C7A5F)
Zone 14
43,6 to 45,0
31
1 888
(0C7A60) to (0D5EFF)
Zone 15
45,0 to 46,4
32
1 888
(0D5F00) to (0E4AFF)
Zone 16
46,4 to 47,8
33
1 888
(0E4B00) to (0F3E5F)
Zone 17
47,8 to 49,1
34
1 888
(0F3E60) to (10391F)
Zone 18
49,1 to 50,5
35
1 888
(103920) to (113B3F)
Zone 19
50,5 to 51,9
36
1 888
(113B40) to (1244BF)
Zone 20
51,9 to 53,3
37
1 888
(1244C0) to (13559F)
Zone 21
53,3 to 54,7
38
1 888
(1355A0) to (146DDF)
Zone 22
54,7 to 56,1
39
1 888
(146DE0) to (158D7F)
Zone 23
56,1 to 57,5
40
1 888
(158D80) to (16B47F)
1 446
(16B480) to (16B4FF) (16B500) to (16B57F) (16B580) to (16B77F) (16B780) to (16BE7F) (16BE80) to (16C57F) (16C580) to (17966F)
DMAs 3 & 4 Reserved Zone Guard Track Zone 1 Drive Test Zone Disk Test Zone Guard Track Zone 2
57,5 to 58,6
40
- 34 -
16.2 16.2.1
Lead-in Zone Structure of Lead-in Zone The structure of the Lead-in Zone is shown in figure 26. The sector numbers indicate the first sector of each zone, as well as the last one of the Initial Zone and of Buffer Zone 2. The first five zones are in the Embossed Area, the Connection Zone constitutes the Mirror Zone, the last seven zones and the Data Zone are in the Rewritable Area.
S ecto r N o .1 6 2 4 8 0 S ecto r N o . 1 9 2 5 11 S ecto r N o . 1 9 2 5 1 2
In itial Z o n e 3 0 0 3 2 S ec to rs R efe ren c e C o d e Z o n e 1 6 S e cto rs
S ecto r N o . (0 2 7 A B 0 ) S ecto r N o . (0 2 E F F F ) (0 2 F 0 0 0 )
S ecto r N o . 1 9 2 5 2 8
B u ffe r Z on e 1 4 9 6 S e cto rs
S ecto r N o . (0 2 F 0 1 0 )
S ecto r N o . 1 9 3 0 2 4
C o n tro l D ata Z o n e 3 0 7 2 S e cto rs
S ecto r N o . (0 2 F 2 0 0 )
S ecto r N o . 1 9 6 0 9 6 S ecto r N o . 1 9 6 6 0 7
B u ffe r Z on e 2 5 1 2 S e cto rs
S ecto r N o . (0 2 F E 0 0 ) S ecto r N o . (0 2 F F F F )
C o n ne ctio n Z o n e S ecto r N o . 1 9 6 6 0 8
G u ard T rac k Z o n e 1 5 1 2 S e cto rs
S ecto r N o . (0 3 0 0 0 0 )
S ecto r N o . 1 9 7 1 2 0
D isk Test Z o n e 1 0 2 4 S ec to rs
S ecto r N o . (0 3 0 2 0 0 )
S ecto r N o . 1 9 8 1 4 4
D riv e Test Z o n e 1 7 9 2 S e cto rs
S ecto r N o . (0 3 0 6 0 0 )
S ecto r N o . 1 9 9 9 3 6
G u ard T rac k Z o n e 2 5 1 2 S e cto rs R eserve d Z o n e 1 2 8 S e cto rs
S ecto r N o . 2 0 0 4 4 8 S ecto r N o . 2 0 0 5 7 6 S ecto r N o . 2 0 0 7 0 4
DMA 1 & DMA 2 1 2 8 S e cto rs D a ta Z o n e
S ecto r N o . (0 3 0 D 0 0 ) S ecto r N o . (0 3 0 F 0 0 ) S ecto r N o . (0 3 0 F 8 0 ) S ecto r N o . (0 3 1 0 0 0 )
97-0152-A
Figure 26 - Structure of Lead-in Zone 16.2.2
Initial Zone This zone shall comprise 30 032 sectors. The Main Data of the Data Frames recorded in the Initial Zone shall be set to (00).
16.2.3
Reference Code Zone The Reference Code Zone shall consist of the 16 Recorded Data Fields from an ECC Block which generate a specific Channel bit pattern on the disk. This shall be achieved by setting to (AC) all 2 048 Main Data bytes of the Data Frame. Moreover, no scrambling shall be applied to this Data Frame, except to the first 160 Main Data bytes of the Data Frame of the ECC Block.
16.2.4
Buffer Zone 1 This zone shall consist of 496 Recorded Data Fields from 31 ECC Blocks. The Main Data of the Data Frames eventually recorded as Recorded Data Fields in this zone shall be set to (00).
- 35 -
16.2.5
Buffer Zone 2 This zone shall consist of 512 Recorded Data Fields from 32 ECC Blocks. The Main Data of the Data Frames recorded as Recorded Data Fields in this zone shall be set to (00).
16.2.6
Control Data Zone The Data fields in the Control Data Zone shall contain embossed control data for the drive. The Control Data Zone comprises the 192 ECC blocks starting from the sector number 193 024 ((2F200)). The content of 16 sectors in each block shown in figure 27 is repeated 192 times. In each ECC Block, the first sector shall contain Physical format information and the second sector in each block shall contain Disk manufacturing information. The contents of the other sectors in each block are reserved. All the bytes in the reserved block shall be set to (00).
Physical format information 2 048 bytes Disk manufacturing information 2 048 bytes
Reserved 14 × 2 048 bytes set to (00)
Figure 27 - Structure of an ECC Block in the Control Data Zone
- 36 -
16.2.6.1
Physical format information This information shall comprise the 2 048 bytes specified by table 5. Table 5 - Physical format information Byte position 0 1 2 3 4 to 15 16 to 31 32 33 to 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 to 479 480 to 2 047
Contents Number of bytes Disk Category and Version Number 1 Disk size and maximum transfer rate 1 Disk structure 1 Recording density 1 Data Zone allocation 12 Reserved 16 Disk Type identification 1 Reserved 15 Velocity 1 1 Read power at Velocity 1 1 Peak power on the land track at Velocity 1 1 Bias Power 1 on the land track at Velocity 1 1 First pulse starting time on the land track at Velocity 1 1 First pulse ending time on the land track at Velocity 1 1 Multiple-pulse duration on the land track at Velocity 1 1 Last pulse starting time on the land track at Velocity 1 1 Last pulse ending time on the land track at Velocity 1 1 Bias Power 2 duration on the land track at Velocity 1 1 Peak power on the groove track at Velocity 1 1 Bias Power 1 on the groove track at Velocity 1 1 First pulse starting time on the groove track at 1 Velocity 1 First pulse ending time on the groove track at 1 Velocity 1 Multiple-pulse duration on the groove track at 1 Velocity 1 Last pulse starting time on the groove track at 1 Velocity 1 Last pulse ending time on the groove track at 1 Velocity 1 Bias Power 2 duration on the groove track at 1 Velocity 1 Reserved for write conditions at Velocity 2 to 414 Velocity 24 Reserved 1 568
Byte 0 - Disk Category and Version Number Bits b7 to b4 Bits b3 to b0
shall specify the Disk Category They shall be set to 0001, indicating a rewritable disk shall specify the Version Number They shall be set to 0001, indicating this ECMA Standard
Other settings are prohibited by this ECMA Standard. Byte 1 - Disk size and maximum transfer rate Bits b7 to b4 Bits b3 to b0
shall specify the disk size. They shall be set to 0000, indicating a 120 mm disk. shall specify the maximum transfer rate. They shall be set to 0010, indicating a maximum transfer rate of 10,08 Mbits/s.
- 37 -
Other settings are prohibited by this ECMA Standard. Byte 2 - Disk structure Bits b7 Bits b6 and b5 Bit b4 Bits b3 to b0
shall be set to ZERO shall specify the number of recording layers accessible through an Entrance surface They shall be set to 00, indicating a single layer shall be set to ZERO shall specify the type of the recording layer They shall be set to 0100, indicating a rewritable recording layer
Other settings are prohibited by this ECMA Standard. Byte 3 - Recording density Bits b7 to b4 Bits b3 to b0
shall specify the average Channel bit length They shall be set to 0010, indicating 0,205 µm to 0,218 µm shall specify the average track pitch They shall be set to 0000, indicating an average track pitch of 0,74 µm
Other settings are prohibited by this ECMA Standard. Byte 4 to 15 - Data Zone allocation Byte 4
Byte 8 Byte 9 to 11 Byte 12 Bytes 13 to 15
shall be set to (00). Byte 5 to 7 shall be set to (031000) to specify the Sector Number 200 704 of the first Recorded Data Field of the Data Zone. shall be set to (00). shall be set to (16B47F) to specify the Sector Number 1 487 999 of the last Recorded Data Field of the Data Zone. shall be set to (00). shall be set to (00).
Other settings are prohibited by this ECMA Standard. Bytes 16 to 31 - Reserved These bytes shall be set to (00). Byte 32 - Disk type identification This byte shall specify the Disk type. This byte shall be set to (00), if a disk shall not be recorded without a case (10), if a disk may be recorded with or without a case Bytes 33 to 47 - Reserved These bytes shall be set to (00). Byte 48 - Velocity 1 This byte shall be set to 00111100, indicating a linear velocity of 6,0 m/s Other settings are prohibited by this ECMA Standard. Byte 49 - Read power at Velocity 1 This byte shall specify the Read power on the surface of the disk for reading at Velocity 1. This byte shall be set to 00001010, indicating a Read power of 1,0 mW. Other settings are prohibited by this ECMA Standard. Byte 50 - Peak power on land tracks at Velocity 1 This byte shall specify the Peak power on the surface of the disk for recording on land tracks at Velocity 1. This byte shall be set to 01101110, indicating a Peak power of 11,0 mW. Other settings are prohibited by this ECMA Standard.
- 38 -
Byte 51 - Bias Power 1 on land tracks at Velocity 1 This byte shall specify the Bias Power 1 on the surface of the disk for recording on land tracks at Velocity 1. This byte shall be set to 00110010, indicating a Bias Power 1 of 5,0 mW. Other settings are prohibited by this ECMA Standard. Byte 52 - First pulse starting time on land tracks at Velocity 1 This byte shall specify the first pulse starting time (TSFP) for recording on land tracks at Velocity 1, see annex H. Bit b7 shall be set to ZERO, indicating the same direction as the laser spot scanning. Bits b6 to b0 shall be set to 0010001, indicating a TSFP of 17 ns. Other settings are prohibited by this ECMA Standard. Byte 53 - First pulse ending time on land tracks at Velocity 1 This byte shall specify the first pulse ending time (TEFP) for recording on land tracks at Velocity 1, see annex H. This byte shall be set to 00110011, indicating a TEFP of 51 ns. Other settings are prohibited by this ECMA Standard. Byte 54 -Multiple-pulse duration on land tracks at Velocity 1 This byte shall specify the multiple-pulse duration time (TMP) for recording on land tracks at Velocity 1, see annex H. This byte shall be set to 00010001, indicating a TMP of 17 ns. Other settings are prohibited by this ECMA Standard. Byte 55 - Last pulse starting time on land tracks at Velocity 1 This byte shall specify the last pulse starting time (TSLP) for recording on land tracks at Velocity 1, see annex H. Bit b7 shall be set to ZERO, indicating the same direction to the laser spot scanning. Bits b6 to b0 shall be set to 0000000, indicating a TSLP of 0 ns. Other settings are prohibited by this ECMA Standard. Byte 56 - Last pulse ending time on land tracks at Velocity 1 This byte shall specify the last pulse ending time (TELP) for recording on land tracks at Velocity 1, see annex H. This byte shall be set to 00100010, indicating a TELP of 34 ns. Other settings are prohibited by this ECMA Standard. Byte 57 -Bias Power 2 duration on land tracks at Velocity 1 This byte shall specify the Bias Power 2 duration (TLE) for recording on land tracks at Velocity 1, see annex H. This byte shall be set to 01000100, indicating a TLE of 68 ns. Other settings are prohibited by this ECMA Standard. Byte 58 - Peak power on groove tracks at Velocity 1 This byte shall specify the Peak power on the surface of the disk for recording on groove tracks at Velocity 1. This byte shall be set to 01101110, indicating a Peak power of 11,0 mW. Other settings are prohibited by this ECMA Standard. Byte 59 - Bias Power 1 on groove tracks at Velocity 1 This byte shall specify the Bias Power 1 on the surface of the disk for recording on groove tracks at Velocity 1. This byte shall be set to 00110010, indicating a Bias Power 1 of 5,0 mW.
- 39 -
Other settings are prohibited by this ECMA Standard. Byte 60 - First pulse starting time on groove tracks at Velocity 1 This byte shall specify the first pulse starting time (TSFP) for recording on groove tracks at Velocity 1, see annex H. Bit b7 shall be set to ZERO, indicating the same direction to the laser spot scanning. Bits b6 to b0 shall be set to 0010001, indicating a TSFP of 17 ns. Other settings are prohibited by this ECMA Standard. Byte 61 - First pulse ending time on groove tracks at Velocity 1 This byte shall specify the first pulse ending time (TEFP) for recording on groove tracks at Velocity 1, see annex H. This byte shall be set to 00110011, indicating a TEFP of 51 ns. Other settings are prohibited by this ECMA Standard. Byte 62 -Multiple-pulse duration on groove tracks at Velocity 1 This byte shall specify the multiple-pulse duration time (TMP) for recording on groove tracks at Velocity 1, see annex H. This byte shall be set to 00010001, indicating a TMP of 17 ns. Other settings are prohibited by this ECMA Standard. Byte 63 - Last pulse starting time on groove tracks at Velocity 1 This byte shall specify the last pulse starting time (TSLP) for recording on groove tracks at Velocity 1, see annex H. Bit b7 shall be set to ZERO, indicating the same direction to the laser spot scanning. Bits b6 to b0 shall be set to 0000000, indicating a TSLP of 0 ns. Other settings are prohibited by this ECMA Standard. Byte 64 - Last pulse ending time on groove tracks at Velocity 1 This byte shall specify the last pulse ending time (TELP) for recording on groove tracks at Velocity 1, see annex H. This byte shall be set to 00100010, indicating a TELP of 34 ns. Other settings are prohibited by this ECMA Standard. Byte 65 -Bias Power 2 duration on groove tracks at Velocity 1 This byte shall specify the Bias Power 2 duration (TLE) for recording on groove tracks at Velocity 1, see annex H. This byte shall be set to 01000100, indicating a TLE of 68 ns. Other settings are prohibited by this ECMA Standard. Byte 66 to 479 - Reserved These bytes shall be set to (00). Byte 480 to 2047 - Reserved These bytes shall be set to (00). 16.2.6.2
Disk manufacturing information This ECMA Standard does not specify the format and the content of these 2 048 bytes. They shall be ignored for interchange.
16.2.7
Connection Zone The Connection Zone is intended to connect the Embossed Area and the Rewritable Area. This zone shall have neither grooves nor embossed marks.
- 40 -
The distance between the track centreline of the last sector of the Buffer Zone 2, sector No. (02FFFF), and that of the first sector of Guard Track Zone 1, sector No. (030000), shall be in the range 1,42 µm to 6,16 µm, see figure 28.
In n er
B u ffer Z o n e 2 (0 2 F F E D )
(0 2 F F E E )
(0 2 F F E F )
(0 2 F F F F ) C o n ne ctio n Z o ne
(0 3 00 1 0 ) (0 3 00 2 1 ) (0 3 00 3 2 ) (0 3 00 4 3 ) (0 3 00 5 4 ) (0 3 00 6 5 ) (0 3 00 7 6 ) (0 3 00 8 7 ) (0 3 00 9 8 ) (0 3 00 A 9 ) (0 3 00 B A ) (0 3 00 C B ) (0 3 00 D C ) (0 3 00 E D ) (0 3 00 F E ) (0 3 01 0 F ) (0 3 01 2 0 )
(0 3 00 0 0 ) (0 3 00 11 ) (0 3 00 2 2 ) (0 3 00 3 3 ) (0 3 00 4 4 ) (0 3 00 5 5 ) (0 3 00 6 6 ) (0 3 00 7 7 ) (0 3 00 8 8 ) (0 3 00 9 9 ) (0 3 00 A A ) (0 3 00 B B ) (0 3 00 C C ) (0 3 00 D D ) (0 3 00 E E ) (0 3 00 F F ) (0 3 011 0 ) (0 3 01 2 1 ) (0 3 01 3 2 )
1 ,4 2 µ m to 6 ,16 µ m (0 3 00 0 1 ) (0 3 00 1 2 ) (0 3 00 2 3 ) (0 3 00 3 4 ) (0 3 00 4 5 ) (0 3 00 5 6 ) (0 3 00 6 7 ) (0 3 00 7 8 ) (0 3 00 8 9 ) (0 3 00 9 A ) (0 3 00 A B ) (0 3 00 B C ) (0 3 00 C D ) (0 3 00 D E ) (0 3 00 E F ) (0 3 01 0 0 ) (0 3 0111 ) (0 3 01 2 2 ) (0 3 01 3 3 )
G u a rd Trac k Z on e 1
O u ter
97-0132-A
Figure 28 - Structure around the Connection Zone 16.2.8
Guard Track Zones 1 and 2 Both zones shall consist of 512 sectors each. They shall contain grooves, lands, Header fields, Mirror fields and the Recording fields. The recording fields of the Guard Track Zones shall be unrecorded.
16.2.9
Disk Test Zone This zone shall consist of 1 024 sectors. It shall contain grooves, lands, Header fields, Mirror fields and Recording fields. This zone is intended for use by disk manufacturers, and shall be ignored in interchange.
16.2.10
Drive Test Zone This zone shall consist of 1 792 sectors. It shall contain grooves, lands, Header fields, Mirror fields and Recording fields. This zone is intended for use by a drive, and shall be ignored in interchange.
16.2.11
Reserved Zone This zone shall consist of 128 sectors set to all ZEROs.
- 41 -
16.2.12
DMA 1 and DMA 2 This zone shall consist of 128 sectors. DMA 1 and DMA 2 shall be as specified in 17.1 .
16.3 16.3.1
Data Zone Structure of Data Zone and of the Defect Management Areas (DMAs) The Data Zone shall contain a Rewritable Area. The Data Zone shall start from sector No. (031000). Each zone of the Data Zone comprises Guard Tracks Zones as specified in 18.2. The position of the DMAs relative to the Data Zone is shown in figure 29.
L ea d -in Zone
DMA1 R eserv ed DMA2 R eserv ed
D a ta Zone
L ea d -o u t Zone
DMA3 R eserv ed DMA4 R eserv ed
Figure 29 - Layout of the Data Zone and DMAs 16.3.2
Guard Track Zones Each zone within the Data Zone shall start and end with a Guard Track Zone, except Zone 0 which does not start with a Guard Track Zone and Zone 23 which does not end with a Guard Track Zone. The number of sectors in the Guard Track Zones shall be the smallest multiple of 16 sufficient to occupy two tracks. The Guard Track Zones shall contain embossed grooves, Header fields and Recording fields which shall be unrecorded.
16.3.3
Partitioning The Data Area shall be partitioned into 24 consecutive Groups. Each Group shall span one complete Zone excluding the Guard Track Zones. Each Group shall comprise a User Area and a Spare Area. The allocation of these area are shown in table 6. Sectors in the User Area shall have a sequential Logical Sector Number (LSN), except as specified in clause 17. All sectors in the User Area specified in table 6 shall be numbered sequentially by the LSN in such a way that the first sector in the User Area in Zone 0 be set to 0 and incremented by 1 for every sector, and the first sector of the User Area in Zone 1 is continued from the last sector in the User Area in Zone 0. The Data Zone shall consist of Data blocks as a unit for writing and reading of ECC blocks. Each Data block shall consist of 16 sectors having consecutive LSN unless the Data block is replaced by the linear replacement algorithm. The Data block shall be so allocated that the LSN of the first sector in the Data block shall be multiple of 16. The User Area and the Spare Area shall be partitioned into Data Blocks and Spare Blocks. Each sector of a Data Block shall have a LSN. A Data Block shall be in one of the following states: - it is an ECC Block, - its Data Field Number is in the range (000000) to (00000F), - it is unwritten.
- 42 Table 6 - Structure of Groups Starting Guard Track Sector Zone Number Zone of Sectors number of Sector No. of the per track the first first and last sectors sector of the Group Group number
User Area Sector number
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Total
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
(031000) (037D60) (040220) (048E40) (0521C0) (05BCA0) (065EE0) (070880) (07B980) (0871E0) (0931A0) (09F8C0) (0AC740) (0B9D20) (0C7A60) (0D5F00) (0E4B00) (0F3E60) (103920) (113B40) (1244C0) (1355A0) (146DE0) (158D80)
-------(037D60) to (037D8F) (040220) to (04024F) (048E40) to (048E6F) (0521C0) to (0521EF) (05BCA0) to (05BCCF) (065EE0) to (065F0F) (070880) to (0708AF) (07B980) to (07B9BF) (0871E0) to (08721F) (0931A0) to (0931DF) (09F8C0) to (09F8FF) (0AC740) to (0AC77F) (0B9D20) to (0B9D5F) (0C7A60) to (0C7A9F) (0D5F00) to (0D5F3F) (0E4B00) to (0E4B4F) (0F3E60) to (0 F3EAF) (103920) to (10396F) (113B40) to (113B8F) (1244C0) to (12450F) (1355A0) to (1355EF) (146DE0) to (146E2F) (158D80) to (158DCF)
LSN of Data Field Sector Ending Guard Track the 1st number of Zone Number of the last Sector No. of the first and the first sector in sector of the the Group sector in last sectors Group the Group
Group
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
(031000) to (0377DF) (037D90) to (03FB2F) (040250) to (0486EF) (048E70) to (051A0F) (0521F0) to (05B48F) (05BCD0) to (06566F) (065F10) to (06FFAF) (0708B0) to (07B04F) (07B9C0) to (08683F) (087220) to (09279F) (0931E0) to (09EE5F) (09F900) to (0ABC7F) (0AC780) to (0B91FF) (0B9D60) to (0C6EDF) (0C7AA0) to (0D531F) (0D5F40) to (0E3EBF) (0E4B50) to (0F31AF) (0F3EB0) to (102C0F) (103970) to (112DCF) (113B90) to (1236EF) (124510) to (13476F) (1355F0) to (145F4F) (146E30) to (157E8F) (158DD0) to (16A57F)
Spare Area Number Sector number of blocks 1 662 (0377E0) to (037D2F) 2 010 (03FB30) to (0401EF) 2 122 (0486F0) to (048E0F) 2 234 (051A10) to (05218F) 2 346 (05B490) to (05BC6F) 2 458 (065670) to (065EAF) 2 570 (06FFB0) to (07084F) 2 682 (07B050) to (07B94F) 2 792 (086840) to (08719F) 2 904 (0927A0) to (09315F) 3 016 (09EE60) to (09F87F) 3 128 (0ABC80) to (0AC6FF) 3 240 (0B9200) to (0B9CDF) 3 352 (0C6EE0) to (0C7A1F) 3 464 (0D5320 ) to (0D5EBF) 3 576 (0E3EC0) to (0E4ABF) 3 686 (0F31B0) to (0F3E0F) 3 798 (102C10) to (1038CF) 3 910 (112DD0) to (113AEF) 4 022 (1236F0) to (12446F) 4 134 (134770) to (13554F) 4 246 (145F50) to (146D8F) 4 358 (157E90) to (158D2F) 4 475 (16A580) to (16B47F) 76 185
Number of sectors 1 360 1 728 1 824 1 920 2 016 2 112 2 208 2 304 2 400 2 496 2 592 2 688 2 784 2 880 2 976 3 072 3 168 3 264 3 360 3 456 3 552 3 648 3 744 3 840 65 392
(037D30) to (037D5F) (0401F0) to (04021F) (048E10) to (048E3F) (052190) to (0521BF) (05BC70) to (05BC9F) (065EB0) to (065EDF) (070850) to (07087F) (07B950) to (07B97F) (0871A0) to (0871DF) (093160) to (09319F) (09F880) to (09F8BF) (0AC700) to (0AC73F) (0B9CE0) to (0B9D1F) (0C7A20) to (0C7A5F) (0D5EC0) to (0D5EFF) (0E4AC0) to (0E4AFF) (0F3E10) to (0F3E5F) (1038D0) to (10391F) (113AF0) to (113B3F) (124470) to (1244BF) (135550) to (13559F) (146D90) to (146DDF) (158D30) to (158D7F) --------
(037D5F) (04021F) (048E3F) (0521BF) (05BC9F) (065EDF) (07087F) (07B97F) (0871DF) (09319F) (09F8BF) (0AC73F) (0B9D1F) (0C7A5F) (0D5EFF) (0E4AFF) (0F3E5F) (10391F) (113B3F) (1244BF) (13559F) (146DDF) (158D7F) (16B47F)
0 26 592 58 752 92 704 128 448 165 984 205 312 246 432 289 344 334 016 380 480 428 736 478 784 530 624 584256 639 680 696 896 755 872 816 640 879 200 943 552 1 009 696 1 077 632 1 147 360
(031000) (0377E0) (03F580) (047A20) (0505C0) (059860) (063200) (06d2A0) (077A40) (0828C0) (08dE40) (099AC0) (0A5E40) (0B28C0) (0BFA40) (0CD2C0) (0DB240) (0E98A0) (0F8600) (107A60) (1175C0) (127820) (138180) (1491E0)
- 43 -
16.4
Lead-out Zone
16.4.1
Structure of Lead-out Zone The structure of the Lead-out Zone shall be as shown in figure 30.
D a ta Z o n e S ecto r N o . 1 4 8 8 0 0 0
D M A 3 an d D M A 4 1 2 8 S ec to rs
S ecto r N o . (1 6 B 4 8 0 )
S ecto r N o . 1 4 8 8 1 2 8
R ese rv ed Z o n e 1 2 8 S ecto rs
S ecto r N o . (1 6 B 5 0 0 )
S ecto r N o . 1 4 8 8 2 5 6
G u a rd T rac k Z o n e 1 5 1 2 S e cto rs
S ecto r N o . (1 6 B 5 8 0 )
S ecto r N o . 1 4 8 8 7 6 8
D riv e Test Z o n e 1 7 9 2 S e cto rs
S ecto r N o . (1 6 B 7 8 0 )
S ecto r N o . 1 4 9 0 5 6 0
D isk Test Z o n e 1 7 9 2 S e cto rs
S ecto r N o . (1 6 B E 8 0 )
S ecto r N o . 1 4 9 2 3 5 2
G u a rd T rac k Z o n e 2 5 3 4 8 8 S ecto rs
S ecto r N o . (1 6 C 5 8 0 )
S ecto r N o . 1 5 4 5 8 4 0
S ecto r N o . (1 7 9 6 7 0 )
97-0153-A
Figure 30 - Structure of Lead-out Zone 16.4.2
DMA 3 and DMA 4 This zone shall consist of 128 sectors. DMA 3 and DMA 4 shall be as specified in 17.1 .
16.4.3
Reserved Zone This zone shall consist of 128 sectors set to all ZEROs.
16.4.4
Guard Track Zone 1 This zone shall consist of 512 sectors. It contains grooves, lands, Header fields, Mirror fields and Recording fields. The Recording fields shall be unrecorded.
16.4.5
Drive Test Zone This zone shall consist of 1 792 sectors. It shall contain grooves, lands, Header fields, Mirror fields and Recording fields. This zone is intended for use by the drive. It shall be ignored in interchange.
16.4.6
Disk Test Zone This zone shall consist of 1 752 sectors. It shall contain grooves, lands, Header fields, Mirror fields and Recording fields. This zone is intended for use by the disk manufacturers. It shall be ignored in interchange.
16.4.7
Guard Track Zone 2 This zone shall consist of 53 488 sectors. It contains grooves, lands, Header fields, Mirror fields and Recording fields. The Recording fields shall be unrecorded.
17 17.1
Defect management Defect Management Areas (DMAs) The four Defect Management Areas contain information on the structure of the Data Zone and on the defect management. The length of each DMA shall be 32 sectors. Two of the DMAs, DMA 1 and DMA 2, shall be located near the inner diameter of the disk; two others, DMA 3 and DMA 4, shall be located near the outer diameter of the
- 44 -
disk. The boundaries of the DMAs are indicated in table 7. Each DMA is followed by two blocks of reserved sectors. Table 7 - Locations of the DMAs Sector No. of the first sector
Sector No. of the last sector
Number of blocks
DMA 1
(030F80)
(030F9F)
2
Reserved
(030FA0)
(030FBF)
2
DMA 2
(030FC0)
(030FDF)
2
Reserved
(030FE0)
(030FFF)
2
DMA 3
(16B480)
(16B49F)
2
Reserved
(16B4A0)
(16B4BF)
2
DMA 4
(16B4C0)
(16B4DF)
2
Reserved
(16B4E0)
(16B4FF)
2
Each DMA shall consist of two ECC blocks followed by two reserved blocks. A Disk Definition Structure (DDS) and a Primary Defect List (PDL) shall be contained in the first ECC block of each DMA (DDS/PDL block). A Secondary Defect List (SDL) shall be contained in the second ECC block of each DMA (SDL block). The contents of the four DMAs shall be identical. After Initialization (see 17.8.2) of the disk, each DMA shall have the following contents : • The first sector of each DDS/PDL block shall contain the DDS. • The second sector of each DDS/PDL block shall be the first sector of the PDL. • The SDL shall start with the first sector of the SDL block. The lengths of the PDL and SDL are determined by the number of entries in each list. The contents of the DDS are specified in 17.2; those of the PDL and SDL are specified in 17.6 and 17.7. Unused sectors in DMAs shall be set to (FF). All reserved sectors shall be set to (00).
17.2
Disk Definition Structure (DDS) The DDS shall consist of a table with a length of one sector. It specifies the method of Formatting (see 17.8) of the disk. The DDS shall be recorded in the first sector of each DMA at the end of Formatting of the disk. The information on the disk structure given in table 8 shall be recorded in each of the four DDSs.
- 45 -
Table 8 - Byte assignment of the Disk Definition Structure Byte position 0 to 1
Contents
Number of bytes
DDS Identifier : (0A0A)
2
2
Reserved
1
3
Disk Certification flag
1
4 to 7
DDS/PDL Update Count
4
8 to 9
Number of Groups
2
10 to 15
Reserved
6
16
Group Certification flag for Group 0
17
Group Certification flag for Group 1
…
…
39
Group Certification flag for Group 23
64
40 to 79
Reserved
80 to 2 047
Reserved
1 968
Bytes 0 to 1- DDS Identifier This 2-byte field shall be set to (0A0A), indicating DDS Identifier. Byte 2- Reserved The byte shall be set to (00) Byte 3- Disk Certification flag This 8-bit field shall be as shown in figure 31. b7
b5 b4
b2
In process
Reserved
b1 User certification
b0 Disk manufacturer certification
Figure 31 - Disk Certification flag This field shall be set as follows. Bit b7
shall be set to ZERO, if Formatting has been completed ONE, if Formatting is in process
Bit b6
shall be set to ZERO, if Formatting is using full certification (see 17.8.1) ONE, if Formatting is using partial certification (see 17.8.1)
Bit b5
shall be set to ZERO, if Formatting is for the whole disk ONE, if Formatting is only for a Group Group certification flags are valid (see Bytes 16-39)
Bits b4 to b2
shall be set to 000
Bit b1
shall be set to ZERO, if the disk has not been certified by a user
- 46 -
ONE, if the disk has been certified by a user Bit b0
shall be set to ZERO, if the disk has not been certified by a manufacturer ONE, if the disk has been certified by a manufacturer
NOTE Bits b5 to b7 shall be set to 1xx at the start of Formatting with any certification and shall be reset to 000 at the end of Formatting. Bytes 4 to 7- DDS/PDL Update Count This field shall specify the total number of the updating and rewriting operations of the DDS/PDL block. This field shall be set to 0 at the beginning of Initialization, and shall be incremented by 1 when the DDS/PDL block is updated or rewritten. A copy of this DDS/PDL Update Count shall be recorded in Bytes 16-19 of SDL (see 17.7). Bytes 8 to 9- Number of Groups This 2-byte field shall be set to (0018), indicating 24 Groups. Bytes 10 to 15 - Reserved All bytes shall be set to (00). Bytes 16 to 39 - Group Certification flag Each byte shall consist of the same 8-bit field shown in figure 32. b7
b6
b5
In process
b2 Reserved
b1
b0
User certification
Reserved
Figure 32 - Group certification flag Bit b7
shall be set to ZERO, if Formatting of this Group has been completed ONE, if Formatting of this Group is in process
Bit b6
shall be set to ZERO, if Formatting of this Group in process is using full certification ONE, if Formatting of this Group in process is using partial certification
Bits b5 to b2
shall be set to ZEROs.
Bit b1
shall be set to ZERO, if this Group has not been certified by user ONE, if this Group has ever been certified by user
Bit b0 shall be set to ZERO. Bytes 40 to 79 - Reserved All bytes shall be set to (00). Bytes 80 to 2 047 - Reserved All bytes shall be set to (00).
17.3
Spare sectors Defective sectors in the Data Area shall be replaced by good sectors according to the defect management method described below. The disk shall be formatted before use. Formatting shall be allowed with or without Certification. The total number of spare sectors shall be 65 392. Defective sectors are handled by a Slipping Algorithm or by a Linear Replacement Algorithm. The total number of entries listed in PDL (see 17.6) and SDL (see 17.7) shall meet the following requirement : SPDL + SSDL ≤ 16 (1 ≤ SPDL ≤ 15, 1 ≤ SSDL ≤ 15)
- 47 -
(
)
(
)
E × 4 + 4 + 2 047 PDL SPDL = int 2 048 E × 8 + 24 + 2 047 SDL SSDL = int 2 048 where, int [x] is the largest integer not greater than x • SPDL is the number of sectors containing PDL entries. • SSDL is the number of sectors containing SDL entries. • EPDL is the number of PDL entries. • ESDL is the number of SDL entries. The number of sectors in a Group listed in the PDL shall not exceed the number of sectors in the Spare Area in the Group.
17.4
Slipping Algorithm The Slipping Algorithm shall be applied individually to each and every Group in the Data Area if defective sectors are listed in PDL. A defective data sector registered in PDL shall be replaced by the first good sector following the defective sector, and so causes a slip of one sector towards the end of the Group. The last data sectors in the Group will slip into the spare sector area of the Group. The sector number of the defective sectors is written in the PDLs. The defective sectors shall not be used for recording user data. The sectors in Spare Area recorded in the PDL shall be slipped if the last data sector slipped into the Spare Area. The relation between Sector number and Logical Sector number when using Slipping Algorithm is shown in figure 33. S e ctor nu m ber
T h e re are n o d efec tiv e sec to rs
D a ta Z o n e
S p a re Z o n e
LSN ( m + n ) se c to rs
S e ctor nu m ber
T h e re are d efec tiv e sec to rs
S p a re Z o n e
LSN m se cto rs
n se cto rs
D efe ctive sectors
97-0154-A
Figure 33 - The relation between Sector numbers and Logical Sector Numbers when using the Slipping Algorithm
- 48 -
17.5
Linear Replacement Algorithm The Linear Replacement Algorithm is used to handle defective sectors due to overwrite cycles, which are found after Formatting, or defective sectors which cannot be registered in the PDL during Formatting. The replacement shall be performed in units of 16 sectors, called a Data block. The defective block shall be replaced by the first available good spare block of the Group. If a replacement block exists in the SDL for the Group, then the first available good Spare Sector is the good block immediately following the last replacement block recorded in the SDL for the Group. If no replacement block exists in the SDL for the Group, then the first available good Spare Block of the Group is the block immediately following the last Data Block of the Group. Spare Blocks found to be defective will appear as gaps in the Spare Area. If there is no good spare block left in the Group, viz. there are less than 16 sectors left in the Group, this shall be indicated by setting the Spare Area Full flag to ONE (figure 36) in the SDL for the corresponding Group, and the defective block shall be replaced by the first available good spare block of another Group. In this case the first sector number of the defective block and the first sector number of the final replacement block shall be recorded in the SDL as a SDL entity, and the Forced Reassignment Marking (FRM; see 17.7) shall be set to ZERO. If a block to be written is listed in the SDL with the FRM set to ZERO, the data shall be written in a replacement block of the Spare Area pointed to by the SDL. If a block to be written is listed in the SDL with the FRM set to ONE, the data shall be written in the first available good spare block of the Group. If there is no spare block left in the Group, viz. there are less than 16 sectors left in the Group, the Spare Area Full flag in the SDL of the corresponding Group shall be set to ONE, and the defective block shall be replaced by the first available good spare block of another Group. The sector number of the new replacement block, and the FRM shall be set to ZERO. When reading the disk, if a Data Block or a Spare Block used as replacement to read, is found to be defective and uncorrectable, and if the disk is not write-inhibited, then the registration of such a defective block and the setting of the FRM are implementation-defined and/or specified by the host. If such a defective Data block is to be registered, the sector number of the first sector of the defective block shall be registered in the SDL as an SDL entry with the FRM set to ONE. The first sector of the replacement block shall be registered as (000000). If such a defective Spare block is to be registered, the setting of the FRM of the corresponding SDL entry shall be changed to ONE. If a Data block is found to be defective after Formatting, it shall be regarded as a defective block and it shall be registered in the SDL. If a replacement block listed in the SDL is later found to be defective, the direct pointer method shall be applied for a registration into the SDL. In this method, the SDL entry in which the defective replacement block has been registered shall be modified by changing the address of the replacement block from the defective one to a new one. At the time of updating the SDL, the SDL Update Count shall be incremented by 1. The relation between Sector number and Logical Sector number when using Linear Replacement is shown in figure 34.
- 49 -
m D a ta B lo ck s
n D a ta B lo ck s
S ec to r n u m be r D a ta Z on e S pa re Z on e LSN R e p la ce m e n t sh a ll b e p e rfo rm ed b lo ck -w ise LSN S pa re Z on e S ec to r n u m be r
D e fe c tiv e bloc k s
( m + n ) S pa re B loc k s 97-0155-A
Figure 34 - The relation between Sector number and Logical Sector number when using Linear Replacement
17.6
Primary Defect List (PDL) The Primary Defect List (PDL) shall always be recorded in each DDS/PDL block; it may be empty. A list of defective sectors may be obtained by means other than Certification of the disk. The PDL shall contain the entries of defective sectors identified at Formatting. Each entry shall specify the Entry type and the Sector number of the corresponding defective sector. The Sector numbers shall be listed in ascending order. The PDL shall be recorded in the minimum number of sectors necessary, and it shall begin in Byte 0 of the first sector of the PDL. All unused bytes of the last sector of the PDL shall be set to (FF). All unused sectors in the DDS/PDL block shall be recorded with data set to (FF). The information in table 9 shall be recorded in each PDL. In the case of multiple-sector PDL, the list of entries of the defective sectors shall continue with the first byte of the second and subsequent sectors. Thus, the PDL Identifier and the number of entries of the PDL shall be present only in the first sector of the PDL. In an empty PDL, the Number of entries in PDL (Bytes 2 and 3 of the first PDL sector) shall be set to (0000) and Bytes 4 to 2 047 shall be set to (FF). The Entry type specifies the origin of the defective sectors : − Defective sectors defined by the disk manufacturer (P-list), − Defective sectors found during the Certification process (G1-list) − Defective sectors which are transferred from the SDL without Certification process (G2-list). The P-list shall be preserved after any Formatting. Table 9 - Contents of the PDL Byte position 0 and 1 2 and 3 4 to 7 8 to 11 --n to n+3
Contents PDL Identifier : (0001) Number of entries in the PDL The first PDL entry The second PDL entry --The last PDL entry
Bytes 0 and 1 - PDL Identifier This field shall be set to (0001), indicating PDL Identifier Bytes 2 and 3 - Number of entries in the PDL This field shall specify the number of entries in the PDL.
Number of bytes 2 2 4 4 --4
- 50 -
PDL entries Each 32-bit field shall be partitioned as shown in figure 35. b31
b30
b29
b24
Entry type
Reserved
b23
b0
Defective Sector number
Figure 35 - PDL entry Bits b31 to b30
shall be set to 00, indicating a P-list 10, indicating a G1-list 11, indicating a G2-list 01 is prohibited by this ECMA Standard.
Bits b29 to b24
shall be set to ZERO
Bits b23 to b0
17.7
shall specify the Sector number of the defective sector.
Secondary Defect List (SDL) The Secondary Defect List (SDL) shall always be recorded in each SDL block; it may be empty. The SDL shall contain entries, which contain the sector number of the first sector of the defective ECC blocks and the sector number of the first sector of the spare blocks which replace them. Each entry in the SDL contains 8 bytes, viz. three each for the sector number of the first sector in a defective block and for that of its replacement block, one byte for Forced Reassignment Marking (FRM) and one reserve byte. The sector numbers of the first sector in the defective blocks shall be listed in ascending order. The SDL shall be recorded in the minimum number of sectors necessary. All unused bytes of the last sector of the SDL shall be set to (FF). All unused sectors in the SDL block shall be recorded with data of (FF). The information in table 10 shall be recorded in each of four SDLs. If a replacement block listed in the SDL is later found to be defective, the direct pointer method shall be applied for registration into the SDL. In this method, the SDL entry in which the defective replacement block has been registered shall be modified by changing the sector number of the first sector of the replacement block from the defective replacement block to a new one. Therefore, the number of entries in the SDL shall remain unchanged by deteriorated sectors. In the case of a multiple-sector SDL, the list of entries shall continue with BP 0 of the second and subsequent sectors. Thus, SDL Identifier, SDL Update Count, Spare-Area Full flags and Number of entries in SDL shall be present only in the first sector of the SDL. Table 10 - Contents of the SDL Byte position
Contents
0 and 1 2 and 3 4 to 7 8 to 15 16 to 19 20 and 21 22 and 23 24 to 31 --m to m+7
SDL Identifier : (0002) Reserved SDL Update Count Spare Area Full flags DDS/PDL Update Count Reserved Number of entries in SDL The first SDL entry --The last SDL entry
Number of bytes 2 2 4 8 4 2 2 8 8
- 51 -
Bytes 0 and 1 - SDL Identifier This field shall be set to (0002), indicating SDL Identifier Bytes 2 and 3 - Reserved All bytes shall be set to (00). Bytes 4 to 7 - SDL Update Count This field shall specify the total number of the updating operations for SDL block, in binary notation. This field shall be set to 0 at the Initialization (see 17.8.2), and shall be incremented by 1 when the contents of the SDL is updated. Bytes 8 to 15 - Spare Area Full flags These flags shall specify whether spare blocks of the corresponding Group are left. Each bit of the flag corresponds each Group as shown in figure 36. b63
b24
Reserved
b23
b22
b21
Group 23
Group 22
Group 21
b20
b3
.........
b2
b1
b0
Group 2
Group 1
Group 0
Figure 36 - Spare Area Full flags Each bit corresponding to the Group shall be set to ONE, if no spare block is left in the Group ZERO, if Spare blocks are left in the Group Bytes 16 to 19 - DDS/PDL Update Count This field shall specify the total number of the updating and rewriting operations for DDS/PDL block. This field shall be set to 0 at the beginning of Initialization, and shall be incremented by 1 when the DDS/PDL block is updated or rewritten. All the DDS/PDL blocks and the SDL blocks shall have the identical Update Count value after completion of Formatting. Bytes 20 and 21 - Reserved All bytes shall be set to (00). Bytes 22 and 23 - Number of entries in the SDL These bytes shall specify the number of entries in the SDL. SDL entry Each 8-byte field shall be partitioned into several fields as shown in figure 37. b63
b56 b55 FRM
b32 b31
Sector number of the first defective sector in the defective block
b24 b23 Reserved
Sector number of the sector in the replacement block
Figure 37 - SDL entry Bit b63
b0
shall be set to ZERO, if the replacement block is assigned and not defective ONE, if the replacement block is either not assigned or assigned but defective
Bits b62 to b56
shall be set to ZERO
Bits b55 to b32
shall specify the sector number of the first sector of the defective block
Bits b31 to b24
shall be set to ZERO
- 52 -
Bits b23 to b0
17.8
shall either specify the sector number of the first sector of the replacement block if assigned, or shall be set to all ZEROs, if the replacement block is not assigned
Formatting of the disk Disks shall be formatted before their use. If there is no DMA recorded on the disk before the Formatting process, the process shall be regarded as Initialization. If there are DMAs recorded on the disk before the Formatting process, the process shall be regarded as Re-initialization. After any Formatting of the disk, the four DMAs shall be recorded. The Data Area shall be partitioned into 24 Groups, see 16.3.3. Each Group shall contain a User Area and a Spare Area. The sectors in the Spare Area can be used as replacements for defective sectors. Formatting is performed by either Initialization or Re-initialization. Either may include Certification of the Groups whereby defective sectors are identified and skipped. All DDS parameters shall be recorded in the four DDS sectors. The PDL and SDL shall be recorded in the four DMAs. All reserved blocks following each DMA shall be filled with (00). The requirements for the recording of the PDLs and SDLs are stated in table 9 and table 10. After Formatting, any of the Data blocks and Spare blocks, which may be allocated as a result of the Slipping Algorithm (see 17.4), shall be in either of the following status. a) A Data block and Spare block contains a set of 16 Physical Data Units that organizes a complete ECC block defined in 13.3. The Physical Data Unit may be written before the Re-initialization. b) All of the sectors in a Data block and Spare block are unwritten. c) All of the sectors in a Data block and Spare block contains a data field number in the range (00) to (0F), which may be written during certification process. After Formatting, three types of entries may exist in PDL, which are P-list, G1-list and G2-list. The types are identified by the Entry type in every entry (see table 9). SDL may also contain entries. When the disk is certified, the Certification shall be applied to the sectors in the User Area and the Spare Area. The method of Certification is not stated by this ECMA Standard. It may involve writing and reading the sectors in the User Area and the Spare Area. Defective sectors in User Area and Spare Area found during Certification shall be listed in the G1-list of PDL and shall be handled by the Slipping Replacement Algorithm. Defective sectors shall not be used for reading or writing. Guideline for replacing defective sectors is given in annex L. If the Formatting process involves certification (see 17.8.1) or other data writing process, the data field number shall be between (000000) to (000000F). The Disk certification flag and, if necessary, the Group certification flag shall be set during the certification in-process. This procedure allows the system to detect the occurrence of a failure during previous Formatting involving the certification or other data writing process. Spare blocks are also allocates at formatting, but the LSN is not assigned. A Spare block is used to replace a defective Data block or to substitute a Spare block. A Spare block is allocated in a Spare Area at Formatting.
17.8.1
Full and Partial Certification There are two types of Certifications : full Certification and partial Certification. In case of full Certification, all the sectors in the User Area and the Spare Area are examined. In case of partial Certification, only defective blocks listed in the G2-list of the PDL and SDL are examined. Other blocks in the Spare Area which are not listed in the G2-list of the PDL or in the SDL may need to be certified.
17.8.2
Initialization If there are no DMA recorded on the disk, the disk shall be initialized. In initialization, the DDS/PDL Update Count and the SDL Update Count shall be set to 0. In the case of Initialization by the disk manufacturer, the defective sectors found during Initialization shall be listed in the P-list of PDL. In the case of Initialization by other than the disk manufacturer, the defective sectors found during Initialization shall be listed in the G1 list of PDL. In both cases, not only the defective sector in the User Area, but defective sectors in the Spare Area shall also be listed in the PDL. A certification process described in 17.8.1 may be applied during Initialization. If the certification process is applied by the disk manufacturer, the Disk Manufacturer Certification field in the Disk Certification flag shall be
- 53 -
set to ONE. If the full certification process is applied for the whole disk by other than the disk manufacturer, the User certification field in the Disk Certification flag shall be set to ONE. If the full certification process is applied for a Group, User certification field in the corresponding Group Certification flag shall be set to ONE. If the User Certification field of all the Group Certification flag has been set to ONE, the User certification field of the Disk Certification flag shall be set to ONE. The number of sectors in a Group to be listed in the PDL shall not exceed the number of sectors in the Spare Area in that Group. If the number of defective sectors encountered within a Group exceeds the number of sectors in the Spare Area in that Group, those defective sectors which cannot be registered in the PDL shall be registered in the SDL and the Spare Area Full flag corresponding to that Group shall be set to ONE. 17.8.3
Re-initialization If DMAs are already recorded on the disk before formatting, the Formatting is regarded as re-initialization. Throughout re-initialization process, the P-list shall be preserved, the DDS/PDL Update Count and SDL Update Count shall be preserved. The re-initialization process may involve processes of 1) applying a full certification to exclude the G1-list from the PDL, and/or to register the new PDL entries found during certification into G1-list of the PDL, 2) transforming SDL entries into G2-list of the PDL, 3) excluding G2-list from the PDL and excluding SDL entries, 4) applying a partial certification to exclude G2-list from the PDL and to exclude SDL entries. In process (1), the G2-list of PDL shall always be excluded. The defective sectors found during Certification shall be registered in the G1-list of the PDL. This process does not always require the disk Certification with writing operation. The modification of G1-list of PDL entries will result in the ECC block miss-alignment, which is against the required condition in 17.8, i.e. state a), b) or c). Therefore, the system that formats the disk should take care to keep the required condition. If the full Certification process is applied for the whole disk by other than the disk manufacturer, User Certification field in the Disk Certification flag shall be set to ONE. If the full Certification process is applied for a Group, User Certification field in the corresponding Group Certification flag shall be set to ONE. If the User Certification field of all the Group Certification flag has been set to ONE, the User Certification field of the Disk Certification flag shall be set to ONE. In process (2), the G1-list of PDL shall be preserved and all of the 16 sectors of a defective block listed in SDL shall be registered in G2-list of PDL as 16 PDL entries. Process (3) allows to revert the PDL entries quickly to the latest certified. In process (4), the partial Certification performs certification only for defective blocks listed in the G2-list of the PDL and SDL, and register actual defective sectors in the G1-list of the PDL. Other blocks in the Spare Area which are not listed in the G2-list of the PDL or in the SDL may need to be certified. The modification of G1-list of PDL entries will result in the ECC block miss-alignment, which is against the required condition in 17.8, states a), b) or c). Therefore, the system that formats the disk should take care to keep the required condition. In any case of above, the number of sectors in a Group to be listed in the PDL shall not exceed the number of sectors in the Spare Area in that Group. If the number of defective sectors encountered within a Group exceeds the number of sectors in the Spare Area in that Group, those defective sectors which cannot be registered in the PDL shall be registered in the SDL and the Spare Area Full flag corresponding to that Group shall be set to ONE. When there exists PDL entries in PDL, these sectors shall be skipped for use even if both of User Certification field and Disk manufacturer Certification field is ZERO. This process is same as the process specified in 17.8
17.8.4
Data field number resulting from Initialization and Re-initialization a) Initialization with Certification a1) The Data Field Numbers of the sectors of an unused block shall be in the range (000000) to (00000F) a2) When such an unused block is used, then the Data Field Numbers of the sectors shall equal {LSN + (031000) }
- 54 -
b) Initialization without Certification b1) The Data Field Numbers of the sectors of an unused block are unwritten b2) When an unused block is used, then the Data Field Numbers of the sectors shall equal {LSN + (031000) } c) Re-initialization of a disk initialized with Certification c1) Re-initialization with Certification c1.1) The Data Field Numbers of the sectors of an unused block shall be in the range (000000) to (00000F) c1.2) When such an unused block is used, then the Data Field Numbers of the sectors shall equal {LSN + (031000) } c2) Re-initialization without Certification c2.1) The Data Field Number of the sectors of an unused block shall either be a multiple of (10) for the first sector and the following sectors shall be consecutively numbered with a block, or these Data Field Numbers shall be in the range (000000) to (00000F) c2.2) When such an unused block is used, then the Data Field Numbers of the sectors shall equal {LSN + (031000) } d) Re-initialization of a disk not certified d1) Re-initialization with Certification d1.1) The Data Field Numbers of the sectors of an unused block shall be in the range (000000) to (00000F) d1.2) When such an unused block is used, then the Data Field Numbers of the sectors shall equal {LSN + (031000) } d2) Re-initialization without Certification d2.1) The Data Field Number of the sectors of an unused block shall either start with a multiple of (10) for the first sector and the following sectors shall be consecutively numbered within a block, or these Data Field Numbers shall be unwritten d2.2) When such an unused block is used, then the Data Field Numbers of the sectors shall equal {LSN + (031000) } e) Re-initialization of an already re-initialized disk e1) Disk obtained by the procedure of either c1), c2) or d1) shall be handled as described in c) e2) Disks obtained from the procedure of d2) shall handled as described in d).
17.9
Write procedure When writing data in the sectors of a Group, a defective sector listed in the PDL shall be skipped, and the data shall be written in the next good data sector according to the Slipping Algorithm. If a block to be written is found to be defective, the defective block shall be replaced by the first available good spare block, according to the Linear Replacement Algorithm. If a block to be written is listed in the SDL with an FRM of ZERO, the data shall be written to a replacement block in the Spare Area pointed by the SDL according to the Linear Replacement Algorithm. If a block to be written is listed in the SDL with an FRM of ONE, the Block shall be replaced by the first available good spare block, according to the Linear Replacement Algorithm.
17.10 17.10.1
Read procedure Blank ECC block A blank ECC block is a Block which meets either of following two conditions. − The Data field number in each sector of the ECC block is between (000000) and (00000F). − The Recording field in each sector is unwritten. A blank ECC block contains no user data.
- 55 -
17.10.2
Read procedure When the data is read from the sectors of a Group, a defective sector listed in the PDL shall be skipped, and the data shall be read from the next data sector according to the Slipping Algorithm. If a Data block to be read is listed in the SDL with either an FRM set to ZERO or ONE, and the sector number of the first sector in the replacement Block is other than (000000), the data shall be read from a replacement block in the Spare Area pointed by the SDL according to the Linear Replacement Algorithm. If a Data block to be read is listed in the SDL with Forced Reassignment Marking set to ONE, and the sector number of the first sector in the replacement Block is (000000), the data shall be read from the Data block. If a Block to be read is found to be defective and correctable, and the disk is not write-inhibited, the defective block may be replaced by the first available good spare block according to the Linear Replacement Algorithm. If a Data block to be read is found to be defective and uncorrectable, and the disk is not write-inhibited, the defective block may be registered to the SDL with the Forced Reassignment Marking set to ONE, according to the Linear Replacement Algorithm. If a Spare block used as a replacement Block to be read is found defective and uncorrectable, and the drive is not write-inhibited, the FRM of the corresponding SDL entry may be set to ONE.
Section 4 - Characteristics of embossed information 18
Method of testing The format of the embossed information on the disk is defined in section 3. Clause 19 to 21 specify the requirements for the signals from lands and grooves, Header fields and Embossed data, as obtained when using the measuring Optical Head in 9.1. Clause 19 to 21 specify only the average quality of the embossed information. Local deviations from the specified values, called defects, can cause tracking errors, erroneous Header fields or errors in the Data fields.
18.1
Environment All signals in clauses 19 to 21 shall be within their specified ranges with the disk in the range of allowed environmental conditions for use defined in 8.1.2.
18.2
Reference Drive All signals specified in clauses 19 to 21 shall be measured in the indicated channels of the reference drive. The drive shall have the following characteristics for the purpose of these tests.
18.2.1
Optics and mechanics The focused optical beam shall have the properties defined in 9.1.
18.2.2
Read power The Read power is the optical power incident on the entrance surface of the disk and used for reading the information. The Read power shall be given in the Control Data Zone (see 16.2.6). The actual power shall be within 10 % of the given power.
18.2.3
Read channels The drive shall have a Read channel 1, in which the total amount of light in the exit pupil of the objective lens is measured. The read signal from the Read channel 1 is not equalized except when measuring jitter. The drive shall have a Read channel 2, in which the differential output of the quadrant photo detectors is measured. The read signal from the Read channel 2 is not equalized except when measuring jitter (see 9.4).
18.2.4
Tracking channel The drive shall have a Tracking channel in which the sum output and differential output of the quadrant photo detectors are measured.
- 56 -
18.2.5
Tracking During the measurement of the signals, the axial tracking error between the focus of the optical beam and Recording layer shall not exceed emax (axial) = 0,23 µm and the radial tracking error between the focus of the optical beam and the centre of a track shall not exceed emax (radial) = 0,022 µm
18.3
Definition of signals All signals are linearly related to currents through a photo-detector and are therefore linearly related to the optical power falling on the detector. The signals from the two halves of the split photo-detector are indicated by I1 and I2. The split photo-detector separator shall be parallel to the projected track axis. The signals in the Tracking channel are referenced to the signal (I1 + I2)a, which is the sum of the signals obtained from the unrecorded, ungrooved area in the Information Zone (see 16.1), such as the Mirror field in a sector. The signal in Read channel 1 is the sum of I1 and I2 referenced to I0, which is the signal (I1 + I2) in Read channel 1 from the unrecorded and ungrooved area in the Information Zone, such as the Mirror field in a sector. The signal in Read channel 2 is the difference of I1 and I2 referenced to I0. Figures 38 to 45 show the signals specified in clauses 19 to 21. (I
+I ) 1 2
B eam on U n groov ed are a
(I
1 + I2 )a
(I 1 - I
2)
0 L eve l ( I - I )pp
1 2
97-01 56-A
Figure 38 - Signals from lands and grooves in Tracking channel A d dre ss M a rk
P ID , P E D , PA
V F O fie ld
I
I v fo I h m in
97-0157-A
Figure 39 - Signals from Header field in Read channel 2
hm ax
- 57 -
M irro r fie ld
G a p fie ld
Io Io t 0 L e v el 97-0158-A
Figure 40 - Signals from Mirror field and Gap field in Read channel 1
H e ad e r 1 V FO 1
IH D 1
H e ad e r 2
H e ad e r 3
H e ad e r 4
V FO 2
V FO 1
V FO 2
IH D 2
IH D 3
IH D 4
0 L ev e l 97-0159-A
Figure 41 - Signals from Header 1, Header 2, Header 3 and Header 4 in Read channel 1
- 58 -
H e ad e r 1 V FO 1
AM
I αH D 1
IA M H D 1
H e ad e r 2 V FO 2
AM
I αH D 2
IA M H D 2
IV FO HD IA M 13
I βH D 1
IV FO H D 2
I βH D 2 IA M H D 3
IA M 31
IV FO HD 4
I βH D 3
I βH D 4
IV FO H D 3 I αH D 3 V FO 1
IA M H D 4
I αH D 4 AM
AM
V FO 2
H e ad e r 3
H e ad e r 4
(a) on groove sector
H e ad e r 3 V FO 1
IA M H D 3
IA M 31
V FO 2
AM
IV FO HD 4 I αH D 4
I αH D 3
IV FO H D 3 I I
βH D 1
IV FO H D 2
IA M H D 1
IA M 13 I
AM
H e ad e r 4
I
βH D 3
βH D 2
I
βH D 4
IA M H D 2
V FO HD 1
I αH D 1 V FO 1
I αH D 2 AM
H e ad e r 1
V FO 2
AM
H e ad e r 2 (b ) on lan d sector
97-01 60-A
Figure 42 - Signals from Header 1, Header 2, Header 3 and Header 4 in Read channel 2
IA M H D 4
- 59 -
I1 4
I 14H
I3 I 3H I
3L
I 14L
0 L ev el 97 -0 002 -A
Figure 43 - Signals in Read channel 1
IT IH IL 0 L ev e l 97-0003-A
Figure 44 - Track-crossing signal from Embossed Area
- 60 -
W pp
(a ) o n gro o v e tra c k
W pp
(b ) o n lan d tra ck 97-0161-A
Figure 45 - Schematic representation of the signals from a groove or a land in Read channel 2
19
Signals from lands and grooves The signals (I1+I2) and (I1-I2) in the Tracking channel shall be low pass filtered with a cut-off frequency of 30 kHz. The low pass filter is a 1st-order filter. This condition shall not apply to the measurement of (I1+I2)a. The shape of the grooves shall be such that the following requirements for circular polarization are met.
19.1
Push-pull signal The push-pull signal is the difference signal (I1-I2) in the Tracking channel, when the light beam crosses the tracks in both of written and unwritten Recording fields of Rewritable Area. The peak-to-peak value of the push-pull signal shall meet the following requirements :
0,35 ≤ 19.2
(I − I ) ≤ 1,05 (I + I ) 1
2 pp
1
2 a
Divided push-pull signal The first term of the divided push-pull signal is the peak-to-peak amplitude derived from the instantaneous level of (I1-I2) when the light beam crosses the tracks in both of the written and unwritten Recording fields of the Rewritable Area divided by the instantaneous level of (I1+I2) when the light beam crosses these tracks. The second term of the divided push-pull signal is the ratio of the minimum peak-to-peak amplitude derived from the instantaneous level of (I1-I2) divided by the instantaneous level of (I1+I2) when the light beam crosses the tracks in both of the written and unwritten Recording fields of the Rewritable Area to the maximum peak-to-peak amplitude derived from the instantaneous level of (I1-I2) divided by the instantaneous level of (I1+I2) when the light beam crosses these tracks. The tracking servo shall operate in open-loop mode during this measurement. The first term shall meet the following requirements :
- 61 -
(I 1 − I 2 ) ≤ 1,65 1,10 ≤ ( I 1 + I 2 ) pp The second term shall satisfy:
I − I 1 2 I 1 + I 2 pp min. ≥ 0,70 I − I 1 2 I I + 2 pp 1 max. 19.3
On-track signal The on-track signal Iot is the signal in Read channel 1 when the light beam is following a groove or a land in the Recording field of the Rewritable Area. The on-track signal Iot measured in the unwritten Gap field shall meet the following requirements : a) On groove track Iot 0,56 ≤ ≤ 0,84 I0 b) On land track Iot 0,56 ≤ ≤ 0,84 I0 In addition the condition (Iot)groove 0,9 ≤ ≤ 1,1 (Iot)land shall be satisfied, on groove tracks as well as on land tracks.
19.4
Phase depth The phase depth of the grooves shall be less than 90°.
19.5
Wobble signal The wobble signal is the signal in Read channel 2 when the light beam is following a groove or a land in the Recording fields of the Rewritable Area. The narrow-band signal-to-noise ratio of the wobble signal shall meet the following requirements. a) On groove track Narrow-band signal-to-noise ratio shall be at least 20 dB (a resolution bandwidth of 3 kHz) b) On land track Narrow-band signal-to-noise ratio shall be at least 20 dB (a resolution bandwidth of 3 kHz) The wobble signal amplitude Wpp shall meet the following requirements, when measured in the unrecorded area. a) On groove track Wpp 0,05 ≤ ≤ 0,10 (I1 - I2)pp
- 62 -
b) On land track Wpp 0,05 ≤ ≤ 0,10 (I1 - I2)pp
(I1 - I2)pp is the peak to peak amplitude of (I1 - I2) in the Tracking channel when the light beam crosses the tracks in an unwritten recordable Recording field.
20
Signals from Header fields The signals obtained from the Header fields in the Rewritable Area shall be measured by Read channel 2 in the Reference Drive. The signal from the Header field is defined as the peak-to-peak value of the signal in Read channel 2. The jitter shall be measured for each of the groove tracks and the land tracks according to the following procedure. • Read the signal from approximately 8 bytes of the VFO 1 field preceding the Address Mark to the PA 2 field in the Header 1 field and Header 2 field under the conditions specified in 18.2. • Read the signal from approximately 8 bytes of the VFO 1 field preceding the Address Mark to the PA 2 field in the Header 3 field and Header 4 field under the conditions specified in 18.2. The jitter is the standard deviation σ of the time variation of digitized data passed through the Read channel 2 specified in 18.2.3. The jitter of the leading edge and trailing edge is measured relative to the PLL clock and normalized by the Channel bit clock period. The jitter shall not exceed 8,5 % of the Channel bit clock period, when measured according to annex F.
20.1
VFO 1 and VFO 2 The signal Ivfo from the marks in the VFO 1 and VFO 2 fields shall meet the following requirements : Ivfo ≥ 0,25 I0 In addition the condition Ivfo ≥ 0,50 Ihmax. shall be satisfied within each Header field, where Ihmax. is the maximum signal from marks of the Header fields defined in clause 20.
20.2
Address Mark, PID, PED and Postamble The signal Ih from marks in the Address Mark, PID, PED and Postamble fields shall meet the following requirements : Ihmin. ≥ 0,10 I0 Ihmax. ≥ 0,30 I0 Ihmin. ≥ 0,30 Ihmax. The last requirement applies over any Header field. The signals Imin and Ihmax. are the signals with minimum and maximum amplitude in each of Header 1, Header 2, Header 3 and Header 4 in a sector.
- 63 -
20.3
Signals from Header 1, Header 2, Header 3 and Header 4 Signals from Header 1, Header 2, Header 3 and Header 4 in Read channel 2 may be used to detect the boundary of the land track and groove track, and signals from Header 1, Header 2, Header 3 and Header 4 in Read channel 1 may be used to compensate for the tracking offset. The signals from Header 1, Header 2, Header 3 and Header 4 of groove sector in Read channel 2 are shown in figure 42. The signals from Header 1, Header 2, Header 3 and Header 4 of land sector in Read channel 2 are shown in figure 42. The signals from Header 1 and Header 2 of groove sector have opposite polarity to those of land sector in Read channel 2. The signals from Header 3 and Header 4 of groove sector have opposite polarity to those of land sector in Read channel 2. The signals from Header 1, Header 2, Header 3 and Header 4 in Read channel 2 shall meet the following requirements. IAMHD2 0,9 ≤ ≤ 1,1 IAMHD1 IAMHD4 0,9 ≤ ≤ 1,1 IAMHD3 IAM13 ≥ 0,8 IAMHD1 IAM31 ≥ 0,8 IAMHD3 The following requirements shall also be met. - 0,10 ≤ (IβHD1 - IαHD1) / 2IAMHD1 ≤ 0,10 - 0,10 ≤ (IβHD2 - IαHD2) / 2IAMHD2 ≤ 0,10 - 0,10 ≤ (IβHD3 - IαHD3) / 2IAMHD3 ≤ 0,10 - 0,10 ≤ (IβHD4 - IαHD4) / 2IAMHD4 ≤ 0,10 The signals from Header 1, Header 2, Header 3 and Header 4 in Read channel 1 shall meet the following requirements (see figure 41). |[(IHD1 + IHD2) - (IHD3 + IHD4)]/2I0 | ≤ 0,05 The signals from Header 1, Header 2, Header 3 and Header 4 in Read channel 1 shall meet the following requirements (see figure 41). 0,10 ≤ |∆[(IHD1 + IHD2) - (IHD3 + IHD4)]/2I0 | : at 0,1 µm radial offset.
20.4
Phase depth The phase depth of the embossed pits shall be less than 90°.
21
Signals from Embossed Area
21.1
High Frequency (HF) signal The HF signal is the signal from marks in the Embossed Area measured in the Read channel 1. See figure 43 and annex F.
21.1.1
Modulated amplitude The peak to peak value generated by the largest length of mark in figure 43 is I14 and the peak value corresponding to HF signal before high-pass filtering is I14H. The 0 Level is the no reflection level. The peak-topeak value of the shortest wavelength is I3.
- 64 -
Above parameters shall satisfy following specifications. I14 / I14H I3 / I14
: :
0,35 min. 0,35 min.
(I14H max. - I14H min.) / I14H max. Within one disk Within one revolution
: :
0,33 max. 0,15 max.
Where IHmax and IHmin are the maximum and the minimum values of I14H within a disk or a revolution. 21.1.2
Signal asymmetry The value of asymmetry shall satisfy the following specifications. - 0,05 ≤ [(I14H + I14L) - (I3H + I3L)] / 2 (I14H - I14L) ≤ 0,15
21.1.3
Cross-track signal Cross-track signal is derived from the HF signal which is low pass filtered with a cut-off frequency of 30 kHz when the light beam crosses the tracks. The low pass filter is a 1st-order filter. See figure 44. The signal shall satisfy the following specifications. IT = IH - IL IT / IH = 0,10 min.
21.2
Jitter The jitter is the standard deviation σ of the time variation of the binarized data passed through the Read Channel 1 specified in 18.2.3. The jitter of the leading and the trailing edge is measured relative to the PLL clock and normalized by the Channel bit clock period. The jitter shall not exceed 8,0 % of the Channel bit clock period, when measured according to annex F.
21.3
Servo signal Output currents of each quadrant photo detector element of the Optical Head are Ia, Ib, Ic and Id. See figure 46.
21.3.1
Differential phase tracking error signal The differential phase tracking error signal is the triangular signal derived from the phase difference between diagonal pairs of detector elements [phase(Ia+Ic) - phase(Ib+Id)], when the light beam crosses the tracks. See figure 47 and 48. The tracking error signal is low pass filtered with a cut-off frequency of 30 kHz. See annex C. Amplitude The tracking error signal at the positive zero crossing shall satisfy 0,5 ≤ ∆ t/T ≤ 1,1 , at 0,10 µm radial offset.
∆ t denotes the average time difference coming from the phase difference between diagonal pairs of detector elements and T denotes the Channel bit clock period. Asymmetry The value of asymmetry shall satisfy the following specifications. | (T1 - T2) / (T1 + T2) | = 0,2 max. 21.3.2
Tangential push-pull signal Tangential push-pull signal is derived from the instantaneous level of the differential output [(Ia + Id) - (Ib + Ic)], when the light beam is following a track. See figure 47. The above parameters shall satisfy [(Ia + Id) - (Ib + Ic)]pp / I14 = 1,2 max.
- 65 -
L ig h t b ea m
Ib
Ia
Tan g en tia l d irectio n
Id
Ic
97-0047-A
Figure 46 - Quadrant photo detector
P it
( I a + I d ) − ( I b +I c )
pp
97-0004-A
Figure 47 - Tangential push-pull signal
T1
∆t
0 L ev e l
T
Tp 0
Tp T2
R ad ial sp o t d isp la ce m e nt Tp : Trac k p itc h
97-0005-A
Figure 48 - Differential phase tracking error signal
Section 5 - Characteristics of the recording layer 22
Method of testing Clause 23 describes a series of tests to assess the phase change recording properties of the Recording layer, as used for writing data. The tests shall be performed in the Recording field of the sectors in the Rewritable Area. The write and read operations necessary for the tests shall be made on the same Reference Drive.
22.1
Environment All signals in clause 23 shall be within their specified ranges with the disk in the operating environment defined in 8.1.2.
22.2
Reference Drive The overwrite and read tests described in clause 23 shall be measured in Read channel 1 of the Reference Drive. The drive shall have the following characteristics for the purpose of these tests.
- 66 -
22.2.1
Optics and mechanics The focused optical beam shall have the properties defined in 9.1. The disk shall rotate as specified in 9.3.
22.2.2
Read power The Read power is the optical power incident on the entrance surface of the disk and used for reading the information. The Read power shall be given in Control Data Zone (see 16.2.6). The actual power shall be within 10 % of the given power.
22.2.3
Read channel The Reference Drive shall have Read channel 1 which can detect marks and spaces in the Recording layer. The read signal from the Read channel 1 is not equalized except when measuring jitter. The threshold level for binarizing the read signal shall be adjusted to minimize the effects of mark and space size changes due to overwriting. Refer to annex F. The drive shall have a Read channel 1, in which the total amount of light in the exit pupil of the objective lens is measured. See 9.4.
22.2.4
Tracking During the measurement of the signals, the focus of the optical beam shall follow the tracks as specified in 18.2.5.
22.3
Write conditions Marks and spaces are overwritten on the disk by pulses of Peak power, Bias Power 1 and Bias Power 2. Marks are overwritten on the disk by irradiating write pulses which are modulated between Peak power and Bias Power 2. Spaces are overwritten on the disk by irradiating Bias Power 1.
22.3.1
Write pulse The Write pulse consists of light-pulse given in figure H.1 of annex H. The Write pulse consists of a first pulse, a mutliple-pulse chain and a last pulse. The Write pulse starts with the first pulse and ends with the last pulse followed by Bias Power 2 duration. The first pulse starts at TSFP later from a leading edge of a NRZI signal and ends at TEFP later from a leading edge of a NRZI signal. TSFP and TEFP shall be given in the Control data Zone. See 16.2.6. The multiple-pulse chain consists of repetitive pulses of duration TMP and period T. It starts at T later from the leading edge time of the NRZI signal in the case of TEFP less than T. The mutliple-pulse chain exists in the Write pulse corresponding to 4T to 14T of the NRZI signal in this case. It starts at 2T later from the leading edge time of the NRZI signal in the case of TEFP larger than or equal to T. The mutliple-pulse chain exists in the Write pulse corresponding to 5T to 14T of the NRZI signal in this case. The last pulse of the mutliple-pulse chain starts at 3T before from the trailing edge time of the NRZI signal. T is the Channel clock duration and TMP shall be given in the Control data Zone. See 16.2.6. The last pulse starts at 2T - TSLP before the trailing edge time of the NRZI signal and ends at 2T - TELP before the trailing edge time of the NRZI signal. TSLP and TELP shall be given in the Control data Zone. See 16.2.6. The Bias Power 2 duration following the last pulse ends at 2T - TLE before the trailing edge time of the NRZI signal. TLE shall be given in the Control data Zone. See 16.2.6. TEFP - TSFP, TMP, TELP - TSLP and TLE - TELP are the full width, half maximum duration. The full width, half maximum duration of each light-pulse is defined in figure H.2 of annex H. The rising time Tr and the falling time Tf shall each be less than 5 ns. The actual duration of each pulse shall be within 10 % of those selected.
22.3.2
Write power The write power has three levels, the Peak power, the Bias Power 1 and Bias Power 2 which are the optical powers incident on the entrance surface of the disk and used for writing marks and spaces. The Peak power and the Bias Power 1 shall be given in the Control data Zone (see 16.2.6) and the Bias Power 2 shall be less than or equal to Read power. All peak powers of the first pulse and the multiple-pulse chain are the same as the Peak power. The actual power shall be within 5 % of those selected.
- 67 -
22.4
Definition of signals The signals in the Read channel are linearly related to the sum of the currents through the split photo-detector, and are therefore linearly related to the optical power falling on the detector.
23 23.1
Write characteristics Modulated amplitude and Signal asymmetry The Modulated amplitude and Signal asymmetry are measured in the Read channel 1. See figure 43 and annex F. The test on phase depth and Signal asymmetry shall be carried out on each of a groove track and a land track of the Disk test Zone and the Drive test Zone. • Overwrite random data in the Recording fields 10 times. The write condition shall be as specified in 22.3. • Read the Recording fields under the conditions specified in 22.2. The peak to peak value generated by the longest length 14T of mark and space in figure 43 is I14 and the peak value corresponding to the read signal is I14H. The 0 level is no reflection level without a disk. The peak-to-peak value of the shortest length 3T of mark and space is I3. Above parameters shall satisfy I14 / I14H I3 / I14
: :
0,43 min. 0,40 min.
(I14max - I14min) / I14max = 0,10 max. Where I14max and I14min are the maximum and the minimum values of I14 within a sector. The maximum value of (I14Hmax - I14Hmin) / I14Hmax shall be : Within a disk : 0,33 max. Within a track : 0,15 max. Where I14Hmax and I14Hmin are the maximum and minimum values of I14H and Iot within a disk or a track. The value of asymmetry shall satisfy -0,05 ≤ [(I14H + I14L) - (I3H + I3L) ] / 2 (I14H - I14L) ≤ 0,15
23.2
Jitter The test on jitter shall be carried out in the Recording fields of any group of five adjacent tracks, designated (m-2), (m-1), m, (m+1), (m+2). When track m is a groove, tracks of (m-2), (m+2) are grooves and tracks of (m-1), (m+1) are lands. On the other hand, when track m is a land, tracks of (m-2), (m+2) are lands and tracks of (m-1), (m+1) are grooves. The Jitter shall be measured for each of the groove and land tracks according to the following procedure. • Overwrite random data in the Recording fields of all five tracks 10 times each. The write condition shall be specified in 22.3. • Read the data from PS field, Data field and PA 3 field, at least, of track m under the conditions specified in 22.2. The jitter is the standard deviation σ of the time variation of digitized data passed through the Read channel 1 specified in 18.2.3 The jitter of the leading and trailing edge is measured relative to the PLL clock and normalized by the Channel bit clock period. The jitter shall not exceed 8,5 % of the Channel bit clock period.
- 68 -
Section 6 - Characteristics of user data 24
Method of testing The user-written data may have been written by any drive in any environment. The read tests shall be performed on the Reference Drive. All signals shall be within their specified ranges in the operating environment defined in 8.1.2. It is recommended that, before testing, the entrance surface of the disk shall be cleaned according to the instructions of the manufacturer of the disk.
- 69 -
Annex A (normative)
Measurement of the angular deviation α The angular deviation is the angle α formed by an incident beam perpendicular to the Reference Plane P with the reflected beam (figure A.1).
Figure A.1 - Angular deviation α For measuring the angular deviation α, the disk shall be clamped between two concentric rings covering most of the Clamping Zone. The top clamping area shall have the same diameters as the bottom clamping area. + 0,5 mm
din = 22,3 mm
- 0,0 mm + 0,0 mm
dout = 32,7 mm
- 0,5 mm
The total clamping force shall be F1 = 2,0 N ± 0,5 N. In order to prevent warping of the disk under the moment of force generated by the clamping force and the chucking force F2 exerted on the rim of the centre hole of the disk, F2 shall not exceed 0,5 N (figure A.2). This measurement shall be made under the conditions of 8.1.1.a).
- 70 -
d o ut
d in
F1
1 5 ,0 0 m m m in .
F1
F2 9 7-0 00 6- A
Figure A.2 - Clamping and chucking conditions
- 71 -
Annex B (normative)
Measurement of birefringence
B.1
Principle of the measurement In order to measure the birefringence, circularly polarized light in a parallel beam is used. The phase retardation is measured by observing the ellipticity of the reflected light.
Figure B.1 - Ellipse with ellipticity e = b/a and orientation θ The orientation θ of the ellipse is determined by the orientation of the optical axis
θ = γ - π/4
(I)
where γ is the angle between the optical axis and the radial direction. The ellipticity e = b/a is a function of the phase retardation δ
1 π − δ 2 2
e = tan
(II)
When the phase retardation δ is known the birefringence BR can be expressed as a fraction of the wavelength BR =
λ 2π
δ
nm
(III)
Thus, by observing the elliptically polarized light reflected from the disk, the birefringence can be measured and the orientation of the optical axis can be assessed as well.
B.2
Measurements conditions The measurement of the birefringence specified above shall be made under the following conditions. Mode of measurement in reflection, double pass through the substrate Wavelength λ of the laser light
645 nm ± 15 nm
Beam diameter (FWHM)
1,0 mm ± 0,2 mm
Angle β of incidence in radial direction
- 72 -
B.3
relative to the radial plane perpendicular to Reference Plane P
7,0° ± 0,2°
Clamping and chucking conditions
as specified by annex A
Disk mounting
horizontally
Rotation
less than 1 Hz
Temperature and relative humidity
as specified in 8.1.1.a)
Example of a measuring set-up Whilst this ECMA Standard does not prescribe a specific device for measuring birefringence, the device shown schematically in figure B.2 as an example, is well suited for this measurement.
Figure B.2 - Example of a device for the measurement of birefringence Light from a laser source, collimated into a polarizer ( extinction ratio ≈ 10-5 ), is made circular by a λ/4 plate. The ellipticity of the reflected light is analyzed by a rotating analyzer and a photo detector. For every location on the disk, the minimum and the maximum values of the intensity are measured. The ellipticity can then be calculated as e2 = Imin / Imax (IV) Combining equations II, III and IV yields BR = λ /4 - λ / π × arctan
I min I max
This device can be easily calibrated as follows − Imin is set to 0 by measuring a polarizer or a λ/ 4 plate, − Imin = Imax when measuring a mirror Apart of the d.c. contribution of the front surface reflection, a.c. components may occur, due to the interference of the reflection(s) of the front surface with the reflection(s) from the recorded layer. These a.c. reflectance effects are significant only if the disk substrate has an extremely accurate flatness and if the light source has a high coherence.
- 73 -
Annex C (normative)
Measurement of the differential phase tracking error
C.1
Measuring method for the differential phase tracking error The reference circuit for the measurement of the tracking error shall be that shown in figure C.1. Each output of the diagonal pairs of elements of the quadrant photo detector shall be digitized independently after equalization of the wave form defined by H(s) = (1 + 1,6 × 10-7 iω) / (1 + 4,7 × 10-8 iω) The gain of the comparators shall be sufficient to reach full saturation on the outputs, even with minimum signal amplitudes. Phases of the digitized pulse signal edges (signals B1 and B2) shall be compared to each other to produce a time-lead signal C1 and a time-lag signal C2. The phase comparator shall react to each individual edge with signal C1 or C2, depending on the sign of ∆ti. A tracking error signal shall be produced by smoothing the C1, C2 signals with low-pass filters and by subtracting by means of a unity gain differential amplifier. The low-pass filters shall be 1st order filters with a cut-off frequency of (-3 dB) 30 kHz. Special attention shall be given to the implementation of the circuit because very small time differences have to be measured, indeed 1 % of T equals only 0,38 ns. Careful averaging is needed. The average time difference between two signals from the diagonal pairs of elements of the quadrant detector shall be ∆t = 1/N ∑∆ti where N is the number of edges both rising and falling.
C.2
Measurement of ∆t /T without time interval analyzer The relative time difference ∆t /T is represented by the amplitude of the tracking error signal provided that the amplitudes of the C1 and C2 signals and the frequency component of the read-out signals are normalized. The relation between the tracking error amplitude ∆TVE and the time difference is given by
∆TVE =
∑ ∆t Vpc = ∑ ∆t Vpc = ∆t × Vpc N nT T n ∑T i
i
i
where Vpc is the amplitude of the C1 and C2 signals Ti is the actual length of the read-out signal in the range 3T to 14T nT is the weighted average value of the actual length N n T is the total averaging time Assuming that Vpc equals 5 V and that the measured value of n equals 5, then the above relation between the tracking error amplitude ∆TVE and the time difference ∆t can be simplified to ∆TVE = ∆t / T
- 74 -
C.3
Calibration of ∆t /T As the gain of the phase comparator tends to vary, special attention shall be given to the calibration of the gain of the phase comparator. The following check and calibration method shall be applied for the measurement of the DPD tracking error signal. a) Checking the measurement circuit a.1) Measure the relation between the amplitude of the first comparator input (3T) and the amplitude of the tracking error signal. a.2) Check the current gain of the amplifier, using the saturation area (see figure C.2). b) Determination of the calibration factor K b.1) Generate two sinusoidal signals A1 and A2 of frequency 2,616 MHz (corresponding to 5T) with phase difference, and feed them into two equalizer circuits. b.2) Measure the relation between ∆t /T and ∆TVE / Vpc. ( ∆TVE / Vpc) K = ( ∆t / T) / n K = (0,2 ∆t /T) / ( ∆TVE / Vpc) for n = 5 The relation between ∆t /T and ∆TVE / Vpc is linear (see figure C.3) c) Compare the measured ∆t /T with the calculated one c.1) Measure ∆t /T using the method of M.1. c.2) Calculate ∆t /T(real) as follows
∆t /T (real) = K × ∆t /T (measured)
- 75 -
Figure C.1 - Circuit for tracking error measurements
- 76 -
A m p litu d e o f th e trac k in g e rro r
sa tu ra tio n are a
0 0
C o m p ara to r in p u t sig na l am p litu d e
Figure C.2 - Comparator input signal amplitude vs tracking error signal amplitude
Figure C.3 - ∆t /T vs ∆TVE / Vpc
- 77 -
Annex D (normative)
Reflectivity calibration and measuring method
D.1
Calibration method A good reference disk shall be chosen, for instance a 0,6 mm glass disk with a golden reflective mirror. This reference disk shall be measured by a parallel beam as shown in figure D.1
Figure D.1 - Reflectance calibration In this figure the following applies. I
= incident beam
r
= reflectivity of the entrance surface
Rs Rint
= main reflectivityof the recorded layer
R//
= measured value, using the arrangement of figure D.1
= other reflectivities of the entrance surface and of the recorded layer
R// = r + Rs + Rint r = ( (n-1) / (n+1) )2 where n is the refraction index of the substrate Rs = R// - r -Rint Rs = [ (1-r)2 × (R// - r)] / [ 1-r × (2 - R//)] The reference disk shall be measured on a reference drive. Imirror obtained from the golden reflective mirror, and measured by the focused beam is equated to Rs as determined above. Now the arrangement is calibrated and the focused reflectivity is a linear function of the reflectivity of the recorded layer, independently from the reflectivity of the entrance surface.
- 78 -
D.2
Measuring method a. Reflectivity in Rewritable Area A method of measuring the reflectivity with an Optical Head. (1) Measure the reflective light power Ds from the reference disk with calibrated reflectivity Rs. (2) Measure the reflective light power Dm from Mirror field. (3) Calculate the disk reflectivity Rd in the Rewritable Area as follows : Rs Rd = × Dm Ds b. Reflectivity in Embossed Area A method of measuring the reflectivity by a Optical Head. (1) Measure the reflective light power Ds from the reference disk with calibrated reflectivity Rs. (2) Measure the reflective light power I14H from Embossed Area (see figure 42). (3) Calculate the disk reflectivity R14H in the Embossed Area as follows : Rs R14H = Ds
× I14H
- 79 -
Annex E (normative)
Tapered cone for disk clamping The device used for centring the disk for measurement shall be a cone with a taper angle β = 40,0°± 0,5° (see figure E.1).
Figure E.1 - Tapered cone
- 80 -
- 81 -
Annex F (normative)
Measuring conditions for the operation signals 1) PLL Natural Frequency Damping Ratio
at 4T at 4T
: :
ωn = 0,3×106 rad/s ξ= 0,7
2) Slicer The slicer shall be a feed-back auto-slicer with a -3 dB closed-loop bandwidth of 10 kHz, 1st order integrating. 3) The jitter in a quarter revolution of the disk shall be measured. R ea d ch a n ne l 1
C o m p a rato r b in ary d ata + -
R ea d ch a n ne l 2
CP
+ -
or
+ -
Figure F.1 - An example of circuit diagram of slicer The bandwidth of the pre-amplifier of the photo detector shall be greater than 20 MHz in order to prevent group-delay distortion. Low-pass filter : 6th order Bessel filter, fc (-3 dB) = 10,0 MHz Example of an analogue equalizer : 3-tap transversal filter with transfer function H(z) = 1,30 z-2 - 0,15 (1 + z-4) Filtering and equalization : − − − −
Gain variation : 1 dB max. (below 8 MHz) Group delay variation : 3 ns max. (below 7 MHz) (Gain at 6 MHz - Gain at 0 Hz) = 2,8 dB ± 0,3 dB a.c. coupling (high-pass filter) = 1st order, ƒc (-3dB) = 1 kHz
- 82 -
F req u e nc y c h ara cteristics fo r E q u alize r an d L o w P ass F ilte r (L P F ) 6 ,0 0 4 ,0 0
G a in (d B )
2 ,0 0 0 ,0 0
-2 ,0 0 E q u a lize r o n ly L P F 6 th E q u a lize r + L P F
-4 ,0 0 -6 ,0 0 0
1
2
3
4
5
6
7
8
F req u e nc y (M H z)
97-0094-A
Figure F.2 - Frequency characteristics for the equalizer and the low-pass filter
9
10
- 83 -
Annex G (normative)
8-to-16 Recording code with RLL (2,10) requirements Tables G.1 and G.2 list the 16-bit Code Words into which the 8-bit coded Data bytes have to be transformed. Figure G.1 shows schematically how the Code Words and the associated State specification are generated.
Figure G.1 - Code Words generation In this figure : X(t) = H {B(t), S(t)} S(t+1) =G{B(t), S(t)} H is the output function G is the next-state function
X15(t) = msb and X0(t) = lsb
The Code Words leaving the States shall be chosen so that the concatenation of Code Words entering a State and those leaving that State satisfy the requirement that between two ONEs there shall be at least 2 and at most 10 ZEROs. As additional requirements : − Code Words leaving State 2 shall have both bit X15 and bit X3 set to ZERO, and − in Code Words leaving State 3 bit X15 or bit X3 or both shall be set to ONE. This means that the Code Word sets of States 2 and 3 are disjoint.
- 84 -
Code Word X(t)
Next State S(t+1)
Code Word X(t+1)
Ends with 1 or no trailing ZERO
State 1
Starts with 2 or up to 9 leading ZEROs
Ends with 2 or up to 5 trailing ZEROs
State 2
Ends with 2 or up to 5 trailing ZEROs
State 3
Ends with 6 or up to 9 trailing ZEROs
State 4
Starts with 1 or up to 5 leading ZEROs, and X15(t+1),X3(t+1) = 0,0 Starts with none or up to 5 leading ZEROs, and X15(t+1),X3(t+1) ≠ 0,0 Starts with 1 or no leading ZERO
Figure G.2 - Determination of States
Note that when decoding the recorded data, knowledge about the encoder is required to be able to reconstitute the original main Data. B(t) = H-1 {X(t), S(t)} Because of the involved error propagation, such state-dependent decoding is to be avoided. In the case of this 8-to-16 recording code, the conversion tables have been chosen in such a way that knowledge about the State is not required in most cases. As can be gathered from the tables, in some cases, two 8-bit bytes, for instance the 8-bit bytes 5 and 6 in States 1 and 2 in table F.1, generate the same 16-bit Code Words. The construction of the tables allows to solve this apparent ambiguity. Indeed, if two identical Code Words leave a State, one of them goes to State 2 and the other to State 3. Because the setting of bits X15 and X3 is always different in these two States, any Code Word can be uniquely decoded by analysing the Code Word itself together with bits X15 and X3 of the next Code Word : B(t) = H-1 { X(t), X15(t+1), X3(t+1) } In the tables, the 8-bit bytes are identified by their decimal value.
- 85 -
Table G.1 - Main Conversion Table 8-bit
State 1
byte
Code Word msb
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45
State 2 Next
Code Word
lsb State msb
0010000000001001 0010000000010010 0010000100100000 0010000001001000 0010000010010000 0010000000100100 0010000000100100 0010000001001000 0010000010010000 0010000100100000 0010010010000000 0010001001000000 0010010010000001 0010001001000001 0010000001001001 0010000100100001 0010000010010001 0010000000100010 0001000000001001 0010000000010001 0001000000010010 0000100000000010 0000010000000001 0010001000100000 0010000100010000 0010000010001000 0010000001000100 0001000100100000 0010000000001000 0001000010010000 0001000001001000 0001000000100100 0001000000000100 0001000000000100 0001000000100100 0001000001001000 0001000010010000 0001000100100000 0010000000001000 0010000001000100 0010000010001000 0010000100010000 0010001000100000 0010010001000000 0001001001000000 0000001000000001
1 1 2 2 2 2 3 3 3 3 4 4 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3 4 4 1
State 3 Next
Code Word
lsb State msb
0100000100100000 0010000000010010 0010000100100000 0100010010000000 0010000010010000 0010000000100100 0010000000100100 0100000000010010 0010000010010000 0010000100100000 0010010010000000 0010001001000000 0010010010000001 0010001001000001 0100000000100100 0010000100100001 0010000010010001 0010000000100010 0100000010010000 0010000000010001 0001000000010010 0000100000000010 0000010000000001 0010001000100000 0010000100010000 0100000000100100 0010000001000100 0001000100100000 0100000010010000 0001000010010000 0100000100100000 0001000000100100 0001000000000100 0001000000000100 0001000000100100 0100001001000000 0001000010010000 0001000100100000 0100100100000001 0010000001000100 0100010010000001 0010000100010000 0010001000100000 0010010001000000 0001001001000000 0100010001000000
2 1 2 4 2 2 3 1 3 3 4 4 1 1 3 1 1 1 2 1 1 1 1 2 2 2 2 2 3 2 3 2 2 3 3 4 3 3 1 3 1 3 3 4 4 4
lsb
0010000000001001 1000000100100000 1000000000010010 0010000001001000 1000000100100000 1001001000000000 1000100100000000 0010000001001000 1000010010000000 1001001000000001 1000100100000001 1000000010010000 1000000010010000 1000010010000001 0010000001001001 1000001001000001 1000000100100001 1000001001000000 0001000000001001 1001000100000000 1000100010000000 1000000010010001 1000000001001001 1000000001001000 1000000001001000 0010000010001000 1000000000100010 1000000000010001 0010000000001000 1001001000000010 0001000001001000 1001000100000001 1000100100000010 1000100010000001 1000000000100100 0001000001001000 1000000000100100 1000010001000000 0010000000001000 1001000010000000 0010000010001000 1000010010000010 1000001000100000 1000010001000001 1000001000100000 1000001001000010
State 4 Next
Code Word
Next
State
msb
lsb State
1 3 1 2 2 4 4 3 4 1 1 3 2 1 1 1 1 4 1 4 4 1 1 2 3 2 1 1 2 1 2 1 1 1 2 3 3 4 3 4 3 1 2 1 3 1
0100000100100000 1000000100100000 1000000000010010 0100010010000000 1000000100100000 1001001000000000 1000100100000000 0100000000010010 1000010010000000 1001001000000001 1000100100000001 1000000010010000 1000000010010000 1000010010000001 0100000000100100 1000001001000001 1000000100100001 1000001001000000 0100000010010000 1001000100000000 1000100010000000 1000000010010001 1000000001001001 1000000001001000 1000000001001000 0100000000100100 1000000000100010 1000000000010001 0100000010010000 1001001000000010 0100000100100000 1001000100000001 1000100100000010 1000100010000001 1000000000100100 0100001001000000 1000000000100100 1000010001000000 0100100100000001 1001000010000000 0100010010000001 1000010010000010 1000001000100000 1000010001000001 1000001000100000 0100010001000000
2 3 1 4 2 4 4 1 4 1 1 3 2 1 3 1 1 4 2 4 4 1 1 2 3 2 1 1 3 1 3 1 1 1 2 4 3 4 1 4 1 1 2 1 3 4
continued
- 86 -
Table G.1 - Main Conversion Table (continued) 8-bit
State 1
byte
Code Word msb
46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94
State 2 Next
Code Word
lsb State msb
0010010010000010 0010000010001001 0010010001000001 0010001001000010 0010001000100001 0001000001001001 0010000100100010 0010000100010001 0010000010010010 0010000001000010 0010000000100001 0000100000001001 0001001001000001 0001000100100001 0001000010010001 0001000000100010 0001000000010001 0000100000010010 0000010000000010 0010010000100000 0010001000010000 0010000100001000 0010000010000100 0010000000010000 0001000010001000 0001001000100000 0001000000001000 0001000100010000 0001000001000100 0000100100100000 0000100010010000 0000100001001000 0000100000100100 0000100000000100 0000100000000100 0000100000100100 0000100001001000 0000100010010000 0000100100100000 0001000000001000 0001000001000100 0001000010001000 0001000100010000 0001001000100000 0010000000010000 0010000010000100 0010000100001000 0010001000010000 0010010000100000
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3
State 3 Next
Code Word
lsb State msb
0010010010000010 0100001001000001 0010010001000001 0010001001000010 0010001000100001 0100000100100001 0010000100100010 0010000100010001 0010000010010010 0010000001000010 0010000000100001 0100000010010001 0001001001000001 0001000100100001 0001000010010001 0001000000100010 0001000000010001 0000100000010010 0000010000000010 0010010000100000 0010001000010000 0100000000100010 0010000010000100 0010000000010000 0100001000100000 0001001000100000 0100000100010000 0001000100010000 0001000001000100 0000100100100000 0000100010010000 0100000001000100 0000100000100100 0000100000000100 0000100000000100 0000100000100100 0100000001000100 0000100010010000 0000100100100000 0100000100010000 0001000001000100 0100001000100000 0001000100010000 0001001000100000 0010000000010000 0010000010000100 0100000000010001 0010001000010000 0010010000100000
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 2 2 2 2 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3 3 3 1 3 3
State 4 Next
Code Word
lsb State msb
1000001000100001 0010000010001001 1000000100010000 1000000010001000 1000000100010000 0001000001001001 1000000100100010 1000000100010001 1000000010010010 1000000010001001 1000000001000010 0000100000001001 1000000000100001 0100000001001001 1001001000010010 1001001000001001 1001000100000010 1000000001000100 0100000001001000 1000010000100000 1000001000010000 0010000100001000 1000000100001000 1000000010000100 0001000010001000 0100000010001000 0001000000001000 1000000001000100 0100000001001000 1000010000100000 1000001000010000 0000100001001000 1000000100001000 1000000010000100 0100000010001000 1000100001000000 0000100001001000 1000000010001000 1001001001001000 0001000000001000 1001001000100100 0001000010001000 1001001001001000 1001000010000001 1000100100010010 1000100100001001 0010000100001000 1000100010000010 1000100001000001
1 1 2 2 3 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 3 3 3 3 2 3 3 3 4 3 3 2 3 2 3 3 1 1 1 3 1 1
Next
lsb State
1000001000100001 0100001001000001 1000000100010000 1000000010001000 1000000100010000 0100000100100001 1000000100100010 1000000100010001 1000000010010010 1000000010001001 1000000001000010 0100000010010001 1000000000100001 0100000001001001 1001001000010010 1001001000001001 1001000100000010 1000000001000100 0100000001001000 1000010000100000 1000001000010000 0100000000100010 1000000100001000 1000000010000100 0100001000100000 0100000010001000 0100000100010000 1000000001000100 0100000001001000 1000010000100000 1000001000010000 0100000001000100 1000000100001000 1000000010000100 0100000010001000 1000100001000000 0100000001000100 1000000010001000 1001001001001000 0100000100010000 1001001000100100 0100001000100000 1001001001001000 1001000010000001 1000100100010010 1000100100001001 0100000000010001 1000100010000010 1000100001000001
1 1 2 2 3 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 1 2 2 2 2 2 3 3 3 3 2 3 3 3 4 3 3 2 3 2 3 3 1 1 1 1 1 1
- 87 -
Table G.1 - Main Conversion Table (continued) 8-bit
State 1
byte
Code Word msb
95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143
State 2 Next
Code Word
lsb State msb
0000001000000010 0000000100000001 0010010010001001 0010010010010010 0010010001000010 0010010000100001 0010001001001001 0010001000100010 0010001000010001 0010000100010010 0010000010000010 0010000100001001 0010000001000001 0001001001000010 0001001000100001 0001000100100010 0001000100010001 0001000010010010 0001000001000010 0001000010001001 0001000000100001 0000100100100001 0000100010010001 0000100001001001 0000100000100010 0000100000010001 0000010000001001 0000010000010010 0010010010000100 0010010000010000 0010001000001000 0010001001000100 0001000100001000 0010000100100100 0000100010001000 0010000100000100 0010000000100000 0001001000010000 0000100000001000 0001000010000100 0001000000010000 0000100100010000 0000100001000100 0000010001001000 0000010010010000 0000010000100100 0000010000000100 0000010000000100 0000010000100100
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 3 3
State 3 Next
Code Word
lsb State msb
0100100100000010 0100100010000001 0100010000100000 0010010010010010 0010010001000010 0010010000100001 0100010010000010 0010001000100010 0010001000010001 0010000100010010 0010000010000010 0100001000010000 0010000001000001 0001001001000010 0001001000100001 0001000100100010 0001000100010001 0001000010010010 0001000001000010 0100010000100000 0001000000100001 0000100100100001 0000100010010001 0100010001000001 0000100000100010 0000100000010001 0100001001000010 0000010000010010 0010010010000100 0010010000010000 0100001000100001 0010001001000100 0100000100100010 0010000100100100 0100000100010001 0010000100000100 0010000000100000 0001001000010000 0100000010010010 0001000010000100 0001000000010000 0000100100010000 0000100001000100 0100000001000010 0000010010010000 0000010000100100 0000010000000100 0000010000000100 0000010000100100
1 1 2 1 1 1 1 1 1 1 1 2 1 1 1 1 1 1 1 3 1 1 1 1 1 1 1 1 2 2 1 2 1 2 1 2 2 2 1 2 2 2 2 1 2 2 2 3 3
lsb
1000010010010010 1000010010001001 0010010010001001 1001001000000100 1001001000100100 1000010001000010 0010001001001001 1000010000100001 1000001001001001 1000001000100010 1000001000010001 0010000100001001 1000000100010010 1000000100001001 1000000010000010 1000000001000001 0100000010001001 1001001001001001 1001001000100010 0001000010001001 1001001000010001 1001000100010010 1001000100001001 0000100001001001 1000100100100100 1000100100000100 0000010000001001 1000100000100000 1000010010000100 1000010000010000 0010001000001000 1000001001000100 0001000100001000 1000001000001000 0000100010001000 1000000100100100 1001001000000100 1000100100100100 0000100000001000 1000100000100000 1000010010000100 1000010000010000 1000001001000100 0000010001001000 1000001000001000 1001000010000010 1000000100000100 1000000100100100 1000000100000100
State 4 Next
Code Word
State
msb
1 1 1 2 3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 2 2 2 2 2 2 2 2 2 3 3 2 3 3 3 3 2 3 1 2 3 3
0100100100000010 0100100010000001 0100010000100000 1001001000000100 1001001000100100 1000010001000010 0100010010000010 1000010000100001 1000001001001001 1000001000100010 1000001000010001 0100001000010000 1000000100010010 1000000100001001 1000000010000010 1000000001000001 0100000010001001 1001001001001001 1001001000100010 0100010000100000 1001001000010001 1001000100010010 1001000100001001 0100010001000001 1000100100100100 1000100100000100 0100001001000010 1000100000100000 1000010010000100 1000010000010000 0100001000100001 1000001001000100 0100000100100010 1000001000001000 0100000100010001 1000000100100100 1001001000000100 1000100100100100 0100000010010010 1000100000100000 1000010010000100 1000010000010000 1000001001000100 0100000001000010 1000001000001000 1001000010000010 1000000100000100 1000000100100100 1000000100000100
Next
lsb State 1 1 2 2 3 1 1 1 1 1 1 2 1 1 1 1 1 1 1 3 1 1 1 1 2 2 1 2 2 2 1 2 1 2 1 2 3 3 1 3 3 3 3 1 3 1 2 3 3
- 88 -
Table G.1 - Main Conversion Table (continued) 8-bit
State 1
byte
Code Word msb
144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192
State 2 Next
Code Word
lsb State msb
0000010001001000 0000010010010000 0000100000001000 0000100001000100 0000100010001000 0000100100010000 0001000000010000 0001000010000100 0001000100001000 0001001000010000 0010000000100000 0010000100000100 0010000100100100 0010001000001000 0010001001000100 0010010000010000 0010010010000100 0000001000010010 0000001000001001 0000000100000010 0000000010000001 0010010010010001 0010010000100010 0010010001001001 0010010000010001 0010001000010010 0010000100000010 0010001000001001 0010000010000001 0001001000100010 0001001000010001 0001000100010010 0001000010000010 0001001001001001 0001000001000001 0000100100100010 0000100100010001 0001000100001001 0000100010010010 0000100001000010 0000100010001001 0000100000100001 0000010010010001 0000010000100010 0000010001001001 0000010000010001 0000001001001000 0000001000100100 0000001000000100
3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2
lsb
0100000010000100 0000010010010000 0100000000010000 0000100001000100 0100000010000100 0000100100010000 0001000000010000 0001000010000100 0100001000010000 0001001000010000 0010000000100000 0010000100000100 0010000100100100 0100000000100001 0010001001000100 0010010000010000 0010010010000100 0100000000010000 0100100100100100 0100100100100100 0100100100010010 0010010010010001 0010010000100010 0100100100000100 0010010000010001 0010001000010010 0010000100000010 0100100000100000 0010000010000001 0001001000100010 0001001000010001 0001000100010010 0001000010000010 0100100010000010 0001000001000001 0000100100100010 0000100100010001 0100100000100000 0000100010010010 0000100001000010 0100010010000100 0000100000100001 0000010010010001 0000010000100010 0100100001000001 0000010000010001 0100010010000100 0100010000010000 0100001001000100
State 3 Next
Code Word
State
msb
2 3 2 3 3 3 3 3 3 3 3 3 3 1 3 3 3 3 2 3 1 1 1 2 1 1 1 3 1 1 1 1 1 1 1 1 1 2 1 1 3 1 1 1 1 1 2 2 2
0000010001001000 1001000001000000 0000100000001000 1000000000100000 0000100010001000 1000000000100000 0100000100001000 1000000001000000 0001000100001000 1001000001000001 0100000100001000 1001000100100100 1000100100100010 0010001000001000 1000100100000100 1001001001000100 1001001000001000 1000100100010001 1000100010010010 1000100010001001 1000100001000010 1001000100100100 1001000100000100 0010010001001001 1001001001000100 1000100000100001 1000010010010001 0010001000001001 1000010001001001 1000010000100010 1000010000010001 1000001000010010 1000001000001001 0001001001001001 1000000100000010 1000000010000001 0100100100001001 0001000100001001 0100010010001001 0100001001001001 0000100010001001 1001000000100000 1000100100001000 1000100010000100 0000010001001001 1000100000010000 1000010010001000 1000010001000100 1000010000001000
State 4 Next
Code Word
lsb State msb 3 4 3 2 3 3 3 4 3 1 2 3 1 3 3 2 2 1 1 1 1 2 2 1 3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 1 2 2 2 2
lsb
0100000010000100 1001000001000000 0100000000010000 1000000000100000 0100000010000100 1000000000100000 0100000100001000 1000000001000000 0100001000010000 1001000001000001 0100000100001000 1001000100100100 1000100100100010 0100000000100001 0100100100000000 1001001001000100 1001001000001000 0100000000010000 0100100100100100 0100100100100100 0100100100010010 1001000100100100 1001000100000100 0100100100000100 1001001001000100 1000100000100001 1000010010010001 0100100000100000 1000010001001001 1000010000100010 1000010000010001 1000001000010010 1000001000001001 0100100010000010 1000000100000010 1000000010000001 0100100100001001 0100100000100000 0100010010001001 0100001001001001 0100010010000100 1001000000100000 1000100100001000 1000100010000100 0100100001000001 1000100000010000 0100010010000100 0100010000010000 0100001001000100
Next State 2 4 2 2 3 3 3 4 3 1 2 3 1 1 4 2 2 3 2 3 1 2 2 2 3 1 1 3 1 1 1 1 1 1 1 1 1 2 1 1 3 2 2 2 1 2 2 2 2
- 89 -
Table G.1 - Main Conversion Table (continued) 8-bit
State 1
byte
Code Word msb
193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241
State 2 Next
Code Word
lsb State msb
0010010010001000 0010010001000100 0010010000001000 0010001000100100 0010001000000100 0010001001001000 0001001001000100 0001000100100100 0001000100000100 0001001000001000 0001000000100000 0000100010000100 0000100000010000 0000100100001000 0000010010001000 0000010001000100 0000010000001000 0000001000000100 0000001000100100 0000001001001000 0000010000001000 0000010001000100 0000010010001000 0000100000010000 0000100010000100 0000100100001000 0001000000100000 0001000100000100 0001000100100100 0001001000001000 0001001001000100 0010001000000100 0010001000100100 0010001001001000 0010010000001000 0010010001000100 0010010010001000 0010000001000000 0000001001001001 0000001000100010 0000001000010001 0000000100010010 0000000100001001 0000000010000010 0000000001000001 0010010000010010 0010001000000010 0010010000001001 0010000100000001
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 4 1 1 1 1 1 1 1 1 1 1 1
State 3 Next
Code Word
lsb State msb
0100010000010000 0010010001000100 0100010010010010 0010001000100100 0010001000000100 0100010001000010 0001001001000100 0001000100100100 0001000100000100 0100010000100001 0001000000100000 0000100010000100 0000100000010000 0100001000100010 0100001000010001 0000010001000100 0100000100010010 0100000010000010 0100000100100100 0100000100000100 0100000001000001 0000010001000100 0100000000100000 0000100000010000 0000100010000100 0100000100000100 0001000000100000 0001000100000100 0001000100100100 0100000100100100 0001001001000100 0010001000000100 0010001000100100 0100001001000100 0100100100000100 0010010001000100 0100000000100000 0010000001000000 0100100100100010 0100100010000100 0100100000010000 0100000001000000 0100100100010001 0100100010010010 0100100001000010 0010010000010010 0010001000000010 0100100010000100 0010000100000001
3 2 1 2 2 1 2 2 2 1 2 2 2 1 1 2 1 1 2 2 1 3 2 3 3 3 3 3 3 3 3 3 3 3 3 3 3 4 1 2 2 4 1 1 1 1 1 3 1
State 4 Next
Code Word
lsb State msb
0010010010001000 1000001001001000 0010010000001000 1000001000100100 1000001000000100 0010001001001000 0100001000001000 1001000000100000 1000100100001000 0001001000001000 1000100010000100 1000010010001000 1000010001000100 0000100100001000 0000010010001000 1000001000100100 0000010000001000 1000010000001000 1000001001001000 1000001000000100 0000010000001000 0100001000001000 0000010010001000 1001001000010000 1001000100000100 0000100100001000 0100000100001001 1001001000010000 1001000100001000 0001001000001000 1001001000001000 1000100000010000 1001001001000010 0010001001001000 0010010000001000 1001000100001000 0010010010001000 1001001000100001 1001000100100010 1001000100010001 1001000010010010 1001000010001001 1001000001000010 1001000000100001 1000100100100001 1000100010010001 1001000010000100 0010010000001001 1001000010000100
2 2 2 2 2 2 2 3 3 2 3 3 3 2 2 3 2 3 3 3 3 3 3 3 3 3 1 2 2 3 3 3 1 3 3 3 3 1 1 1 1 1 1 1 1 1 3 1 2
lsb
0100010000010000 1000001001001000 0100010010010010 1000001000100100 1000001000000100 0100010001000010 0100001000001000 1001000000100000 1000100100001000 0100010000100001 1000100010000100 1000010010001000 1000010001000100 0100001000100010 0100001000010001 1000001000100100 0100000100010010 0100000010000010 0100000100100100 0100000100000100 0100000001000001 0100001000001000 0100000000100000 1001001000010000 1001000100000100 0100000100000100 0100000100001001 1001001000010000 1001000100001000 0100000100100100 1001001000001000 1000100000010000 1001001001000010 0100001001000100 0100100100000100 1001000100001000 0100000000100000 1001001000100001 0100100100100010 0100100010000100 0100100000010000 0100000001000000 0100100100010001 0100100010010010 0100100001000010 1000100010010001 1001000010000100 0100100010000100 1001000010000100
Next State 3 2 1 2 2 1 2 3 3 1 3 3 3 1 1 3 1 1 2 2 1 3 2 3 3 3 1 2 2 3 3 3 1 3 3 3 3 1 1 2 2 4 1 1 1 1 3 3 2
- 90 -
Table G.1 - Main Conversion Table (concluded) 8-bit
State 1
byte
Code Word msb
242 243 244 245 246 247 248 249 250 251 252 253 254 255
State 2 Next
Code Word
lsb State msb
0001001000010010 0001000100000010 0001001000001001 0001000010000001 0000100100010010 0000100010000010 0000100100001001 0000100001000001 0000010010010010 0000010001000010 0000010010001001 0000010000100001 0000001001000100 0000001000001000
1 1 1 1 1 1 1 1 1 1 1 1 2 2
State 3 Next
Code Word
lsb State msb
0001001000010010 0001000100000010 0100100000100001 0001000010000001 0000100100010010 0000100010000010 0100010010010001 0000100001000001 0000010010010010 0000010001000010 0100010000100010 0000010000100001 0100010000010001 0100001000010010
1 1 1 1 1 1 1 1 1 1 1 1 1 1
State 4 Next
Code Word
lsb State msb
1000000010000000 1000100001001001 0001001000001001 1000100000100010 1000100000010001 1000010000010010 0000100100001001 1000010000001001 1000001000000010 1000000100000001 0000010010001001 0100100010001001 1001000000010000 1000100100010000
4 1 1 1 1 1 1 1 1 1 1 1 2 2
Next
lsb State
1000000010000000 1000100001001001 0100100000100001 1000100000100010 1000100000010001 1000010000010010 0100010010010001 1000010000001001 1000001000000010 1000000100000001 0100010000100010 0100100010001001 0100010000010001 0100001000010010
4 1 1 1 1 1 1 1 1 1 1 1 1 1
- 91 -
Table G.2 - Substitution table 8-bit
State 1
byte
Code Word msb
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46
State 2 Next
Code Word
lsb State msb
0000010010000000 0000100100000000 0001001000000000 0000001001000000 0000000100100000 0000000010010000 0000000001001000 0000000001001000 0000000010010000 0000000100100000 0000010001000000 0000100010000000 0001000100000000 0010001000000000 0000001000100000 0000000100010000 0000000010001000 0000000001000100 0000000001000100 0000000010001000 0000000100010000 0000001000100000 0000010010000001 0000100100000001 0001001000000001 0010010000000001 0000000001001001 0000000010010001 0000000100100001 0000001001000001 0000100001000000 0001000010000000 0010000100000000 0000010000100000 0000001000010000 0000000100001000 0000000010000100 0000010000100000 0000000010000100 0000000100001000 0000001000010000 0000010001000001 0000010010000010 0000100010000001 0000100100000010 0001000100000001 0001001000000010
4 4 4 4 3 3 3 2 2 2 4 4 4 4 3 3 3 3 2 2 2 2 1 1 1 1 1 1 1 1 4 4 4 3 3 3 3 2 2 2 2 1 1 1 1 1 1
State 3 Next
Code Word
lsb State msb
0000010010000000 0000100100000000 0001001000000000 0100010000000001 0100100000000010 0100001000000000 0100100000000100 0100000100000000 0100100010010000 0100100000100100 0000010001000000 0000100010000000 0001000100000000 0010001000000000 0100100000000100 0100100010010000 0100001000000001 0100010000000010 0100100000100100 0100100100100000 0100100100100000 0100100000010010 0000010010000001 0000100100000001 0001001000000001 0010010000000001 0100010000000100 0100000100000001 0100010000000100 0100001000000010 0000100001000000 0001000010000000 0010000100000000 0000010000100000 0100010000010010 0100100000010001 0100000010000000 0000010000100000 0100010000100100 0100010000100100 0100100000100010 0000010001000001 0000010010000010 0000100010000001 0000100100000010 0001000100000001 0001001000000010
4 4 4 1 1 4 2 4 3 2 4 4 4 4 3 2 1 1 3 3 2 1 1 1 1 1 3 1 2 1 4 4 4 3 1 1 4 2 3 2 1 1 1 1 1 1 1
State 4 Next
Code Word
lsb State msb
0100100001001000 0100100001001000 0100100000001001 1000001000000000 1001000000000100 1001000000100100 1001000001001000 1001000000000100 1001000000100100 1001000001001000 1001001001000000 1000100001001000 0100010001001000 1000100000000100 1001000010010000 1001000100100000 0100100000001000 0100100010001000 1001000010010000 1001000100100000 0100010001001000 0100100000001000 1000100000100100 1000100010010000 0100100010001000 1000100000000100 1000010000000001 1000100000000010 1001000000001001 1001000000010010 1000100000100100 1000100001001000 0100010000001001 0100100001001001 1000100100100000 1001000000001000 1001000001000100 1000001000000001 1000100010010000 1000100100100000 1001000000001000 1000010000000010 1000000100000000 1001000001000100 1000100000001001 1001000010001000 1001000100010000
2 3 1 4 3 3 3 2 2 2 4 3 3 3 3 3 3 3 2 2 2 2 3 3 2 2 1 1 1 1 2 2 1 1 3 3 3 1 2 2 2 1 4 2 1 3 3
Next
lsb State
0100100001001000 0100100001001000 0100100000001001 0100010000000001 0100100000000010 0100001000000000 0100100000000100 0100000100000000 0100100010010000 0100100000100100 1001001001000000 1000100001001000 0100010001001000 1000100000000100 0100100000000100 0100100010010000 0100001000000001 0100010000000010 0100100000100100 0100100100100000 0100100100100000 0100100000010010 1000100000100100 1000100010010000 0100100010001000 1000100000000100 0100010000000100 0100000100000001 0100010000000100 0100001000000010 1000100000100100 1000100001001000 0100010000001001 0100100001001001 0100010000010010 0100100000010001 0100000010000000 1000001000000001 0100010000100100 0100010000100100 0100100000100010 1000010000000010 1000000100000000 1001000001000100 1000100000001001 1001000010001000 1001000100010000
2 3 1 1 1 4 2 4 3 2 4 3 3 3 3 2 1 1 3 3 2 1 3 3 2 2 3 1 2 1 2 2 1 1 1 1 4 1 3 2 1 1 4 2 1 3 3
- 92 -
Table G.2 - Substitution table (concluded) 8-bit
State 1
byte
Code Word msb
47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87
State 2 Next
Code Word
lsb State msb
0010001000000001 0010010000000010 0000000001000010 0000000010001001 0000000010010010 0000000100010001 0000000100100010 0000001000100001 0000001001000010 0001000001000000 0010000010000000 0010010010010000 0010010001001000 0010010000100100 0010010000000100 0001001001001000 0001001000100100 0001001000000100 0000100100100100 0000100100000100 0000100000100000 0000010010000100 0000010000010000 0000001001000100 0000001000001000 0000000100100100 0000000100000100 0000010000010000 0001001001001000 0000010010000100 0000100000100000 0010010001001000 0000100100000100 0000100100100100 0001001000000100 0001001000100100 0010010000000100 0010010000100100 0010010010010000 0000000100000100 0000000100100100
1 1 1 1 1 1 1 1 1 4 4 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2
State 3 Next
Code Word
lsb State msb
0010001000000001 0010010000000010 0100100010010001 0100100001000100 0100010010010000 0100010010010000 0100100001000100 0100100100100001 0100100100010000 0001000001000000 0010000010000000 0010010010010000 0100100100010000 0010010000100100 0010010000000100 0100000010000001 0001001000100100 0001001000000100 0000100100100100 0000100100000100 0000100000100000 0000010010000100 0000010000010000 0100001000000100 0100100000010000 0100010001000100 0100001000100100 0000010000010000 0100001000000100 0000010010000100 0000100000100000 0100000100000010 0000100100000100 0000100100100100 0001001000000100 0001001000100100 0010010000000100 0010010000100100 0010010010010000 0100001000100100 0100010001000100
1 1 1 3 3 2 2 1 3 4 4 3 2 3 3 1 3 3 3 3 3 3 3 2 3 3 3 2 3 2 2 1 2 2 2 2 2 2 2 2 2
State 4 Next
Code Word
lsb State msb
1000100000010010 0100010000001000 1001000000010001 1001000000100010 1001000001001001 1001000010010001 1001000100100001 1001001001000001 0100001000001001 1001001000100000 1001000010001000 1001000100010000 0010010001001000 1001001000100000 0100001001001000 0001001001001000 0100001001001000 0100010010001000 0100100100001000 1000010000000100 1000010000100100 1000010001001000 1000010010010000 1000100000001000 1000100010001000 1000100100010000 1001000000010000 1000100001000100 0001001001001000 0100010000001000 0100010010001000 0010010001001000 0100100100001000 1000010000000100 1000010000100100 1000010001001000 1000010010010000 1000100000001000 0100010001001001 1000100001000100 1000100010001000
1 3 1 1 1 1 1 1 1 3 2 2 3 2 2 3 3 3 3 3 3 3 3 3 3 3 3 3 2 2 2 2 2 2 2 2 2 2 1 2 2
Next
lsb State
1000100000010010 0100010000001000 0100100010010001 0100100001000100 0100010010010000 0100010010010000 0100100001000100 0100100100100001 0100100100010000 1001001000100000 1001000010001000 1001000100010000 0100100100010000 1001001000100000 0100001001001000 0100000010000001 0100001001001000 0100010010001000 0100100100001000 1000010000000100 1000010000100100 1000010001001000 1000010010010000 0100001000000100 0100100000010000 0100010001000100 0100001000100100 1000100001000100 0100001000000100 0100010000001000 0100010010001000 0100000100000010 0100100100001000 1000010000000100 1000010000100100 1000010001001000 1000010010010000 1000100000001000 0100010001001001 0100001000100100 0100010001000100
1 3 1 3 3 2 2 1 3 3 2 2 2 2 2 1 3 3 3 3 3 3 3 2 3 3 3 3 3 2 2 1 2 2 2 2 2 2 1 2 2
(b ) T he sh a p e of th e ligh t p ulse
(A ) N R Z I sign al
L a ser p ow er R ead p o w er
B ia s p o w er 1
P e ak p o w er
T
T EFP
T SF P TMP
F ir st p u lse
W rite p u lse
T LE
T SLP
T ELP
5T
T SFP
T
9 7 -0 1 6 2-A
Figure H.1 - The wave form of the Write pulse T LE
T SLP
TE LP B ia s p o w e r2 d u ra tio n
L ast p u lse
W rite p u lse
TMP
F ir st p u lse
M u ltip le-p u lse ch ain
T EFP B ias p o w er2
B ia s p o w e r2 d u ratio n
L a st p u lse
TMP
M u ltip le-p u lse ch ain
11 T
B ia s p o w e r2 d u ratio n
W r ite p u lse
T LE
L a st p ulse
T EFP
T SFP
T SLP
TEL P
F ir st p u lse
3T
T im e
- 93 -
Annex H
(normative)
Definition of the write pulse
The wave forms of the NRZI signal and the shape of light-pulse shall be as shown in figure H.1.
- 94 -
T -T EFP SFP
T MP
T -T ELP SLP
T -T LE ELP P e ak P o w er
P 0 ,9 P 1 1
0 ,5 P1
P 2
0 ,5 P2
0 ,1 P1 Tr
B ia s P o w er 1
0 ,9 P2 0 ,9 P3
0 ,1 P 2
P3 0 ,5 P3
B ia s P o w er 2 0 ,1 P3
Tf
Tr
T
f
Tr
Tf
97-0163-A
Figure H.2 - Definition of the light-pulse shape
Tr
- 95 -
Annex J (informative)
Guideline for randomization of the Gap length, the Guard 1 length and the recording polarity
U ser D a ta C h o ic e o f J, K an d p o la rity S cra m b le & E C C
fo r ev e ry se cto r
8 -to -1 6 R e co rd in g a n d D C C K J
A d d G u ard 1 , V F O 3 , P S , PA 3 , a n d G u a rd 2
N R Z I-c o n v erte r
R an d o m sig n al g en e rato r
P o la rity altern a tio n : P
L D d riv er
Figure J.1 - Guideline for randomization of the Gap length, the Guard 1 length and the recording polarity
P
J
K
clo ck P : p o sitiv e /n e g a tiv e J : 0 to 1 5 C h an n e l b its K : 0 to 7 b y tes
w rite g ate ⊕ stands for Exclusive OR
Figure J.2 - Example of a random signal generator
- 96 -
- 97 -
Annex K (informative)
Transportation
K.1
General As transportation occurs under a wide range of temperature and humidity variations, for differing periods, by many methods of transport and in all parts of the world, it is not possible to specify mandatory conditions for transportation or for packaging.
K.2
Packaging The form of packaging should be agreed between sender and recipient or, in absence of such an agreement, is the responsibility of the sender. It should take into account the following hazards.
K.2.1
Temperature and humidity Insulation and wrapping should be designed to maintain the conditions for storage over the estimated period of transportation.
K.2.2
Impact loads and vibrations a) Avoid mechanical loads that would distort the shape of the disk. b) Avoid dropping the disk. c) Disks should be packed in a rigid box containing adequate shock-absorbent material. d) The final box should have a clean interior and a construction that provides sealing to prevent the ingress of dirt and moisture.
- 98 -
- 99 -
Annex L (informative)
Guideline for sector replacement Clause 17 assumes that a defective sector will be replaced by the defect management. The following is an example of the criteria which could be applied by the defect management. PID error: Row error:
There are 3 or more erroneous PIDs within a sector. There are 4 or more erroneous bytes in a row of an ECC Block.
Slipping Algorithm If a sector presents a PID error, it should be replaced. If a sector presents 4 or more row errors, it should be replaced. If an ECC Block presents 6 or more row errors, then enough sectors should be slipped so as to reduce the number of row errors in the ECC Block to less than 6. Linear Replacement Algorithm If an ECC Block presents 1 or more sectors containing a PID error, then the whole ECC Block should be replaced. If an ECC Block presents 8 or more row errors, then the whole ECC Block should be replaced.
.
.
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