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Integration of Engineered Source and Drain Extensions in Double Gate Mosfet with Sub-32nm Channel Length

Name: Integration of Engineered Source and Drain Extensions in Double Gate Mosfet with Sub-32nm Channel Length
Published: 2011
License: Open Access

Bhandari, Jyotshna · 2011

DataCite · Datasets · License: Open Access · 2011

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cmos

cmos, double gate, etching, epitaxy, silicidation, dopant segregation, series resistance, double-grille

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Record · ID 1100349
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